{"id":"https://openalex.org/W1515729431","doi":"https://doi.org/10.1109/ecctd.2005.1522901","title":"2-V CMOS current operational amplifier with high CMRR","display_name":"2-V CMOS current operational amplifier with high CMRR","publication_year":2006,"publication_date":"2006-10-11","ids":{"openalex":"https://openalex.org/W1515729431","doi":"https://doi.org/10.1109/ecctd.2005.1522901","mag":"1515729431"},"language":"en","primary_location":{"id":"doi:10.1109/ecctd.2005.1522901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2005.1522901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042746376","display_name":"R. Luzzi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210131793","display_name":"Infineon Technologies (Austria)","ror":"https://ror.org/03msng824","country_code":"AT","type":"company","lineage":["https://openalex.org/I137594350","https://openalex.org/I4210131793"]}],"countries":["AT"],"is_corresponding":true,"raw_author_name":"R. Luzzi","raw_affiliation_strings":["Infineon Technologies Austria AG, Graz, Austria","Infineon Technol. Austria, Graz, Austria"],"affiliations":[{"raw_affiliation_string":"Infineon Technologies Austria AG, Graz, Austria","institution_ids":["https://openalex.org/I4210131793"]},{"raw_affiliation_string":"Infineon Technol. Austria, Graz, Austria","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004729135","display_name":"Salvatore Pennisi","orcid":"https://orcid.org/0000-0002-5803-484X"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"S. Pennisi","raw_affiliation_strings":["Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi, Universit\u00e0 di Catania, Catania, Italy","University of Catania"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi, Universit\u00e0 di Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]},{"raw_affiliation_string":"University of Catania","institution_ids":["https://openalex.org/I39063666"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010336494","display_name":"Giuseppe Scotti","orcid":"https://orcid.org/0000-0002-5650-8212"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"G. Scotti","raw_affiliation_strings":["Dipartimento di Ingegneria Elettronica, Universit\u00e0 di Roma La Sapienza, Rome, Italy","Engineering, Electronics and Telecommunications"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettronica, Universit\u00e0 di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"Engineering, Electronics and Telecommunications","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068452963","display_name":"Alessandro Trifiletti","orcid":"https://orcid.org/0000-0001-6231-4273"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"A. Trifiletti","raw_affiliation_strings":["Dipartimento di Ingegneria Elettronica, Universit\u00e0 di Roma La Sapienza, Rome, Italy","University of Rome \u201cLa Sapienza \u201d"],"affiliations":[{"raw_affiliation_string":"Dipartimento di Ingegneria Elettronica, Universit\u00e0 di Roma La Sapienza, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]},{"raw_affiliation_string":"University of Rome \u201cLa Sapienza \u201d","institution_ids":["https://openalex.org/I861853513"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5042746376"],"corresponding_institution_ids":["https://openalex.org/I4210131793"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.04951797,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"27","last_page":"30"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/gain\u2013bandwidth-product","display_name":"Gain\u2013bandwidth product","score":0.754338264465332},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6904237270355225},{"id":"https://openalex.org/keywords/common-mode-rejection-ratio","display_name":"Common-mode rejection ratio","score":0.6236486434936523},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.6020458340644836},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.49134984612464905},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4894803762435913},{"id":"https://openalex.org/keywords/direct-coupled-amplifier","display_name":"Direct-coupled amplifier","score":0.44022107124328613},{"id":"https://openalex.org/keywords/current-feedback-operational-amplifier","display_name":"Current-feedback operational amplifier","score":0.434852659702301},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4336293935775757},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4335757791996002},{"id":"https://openalex.org/keywords/open-loop-gain","display_name":"Open-loop gain","score":0.4283599853515625},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.42212027311325073},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.34671497344970703},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3077697157859802},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12206432223320007}],"concepts":[{"id":"https://openalex.org/C38566628","wikidata":"https://www.wikidata.org/wiki/Q1634194","display_name":"Gain\u2013bandwidth product","level":5,"score":0.754338264465332},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6904237270355225},{"id":"https://openalex.org/C102309569","wikidata":"https://www.wikidata.org/wiki/Q1244941","display_name":"Common-mode rejection ratio","level":5,"score":0.6236486434936523},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.6020458340644836},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.49134984612464905},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4894803762435913},{"id":"https://openalex.org/C172218469","wikidata":"https://www.wikidata.org/wiki/Q4477697","display_name":"Direct-coupled amplifier","level":5,"score":0.44022107124328613},{"id":"https://openalex.org/C68742264","wikidata":"https://www.wikidata.org/wiki/Q1736442","display_name":"Current-feedback operational amplifier","level":5,"score":0.434852659702301},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4336293935775757},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4335757791996002},{"id":"https://openalex.org/C143931264","wikidata":"https://www.wikidata.org/wiki/Q5932986","display_name":"Open-loop gain","level":5,"score":0.4283599853515625},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.42212027311325073},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.34671497344970703},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3077697157859802},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12206432223320007}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/ecctd.2005.1522901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecctd.2005.1522901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005.","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/216667","is_oa":false,"landing_page_url":"https://hdl.handle.net/11573/216667","pdf_url":null,"source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W205377273","https://openalex.org/W2047015515","https://openalex.org/W2086775967","https://openalex.org/W2111747532","https://openalex.org/W2119710228","https://openalex.org/W2141844803"],"related_works":["https://openalex.org/W2167952956","https://openalex.org/W2125921747","https://openalex.org/W4285184060","https://openalex.org/W2095781863","https://openalex.org/W2394294554","https://openalex.org/W2391189180","https://openalex.org/W4387100143","https://openalex.org/W2022165529","https://openalex.org/W2394349332","https://openalex.org/W2939385727"],"abstract_inverted_index":{"A":[0],"CMOS":[1],"current":[2],"operational":[3],"amplifier":[4],"with":[5,37],"high":[6],"common":[7],"mode":[8],"rejection":[9],"is":[10,14,71],"presented.":[11],"This":[12],"performance":[13],"obtained":[15],"through":[16],"a":[17,29,56],"feedback-enhanced":[18],"output":[19],"stage":[20],"exhibiting":[21],"also":[22],"low":[23],"supply":[24],"voltage":[25],"requirements.":[26],"Simulations":[27],"using":[28],"0.25-/spl":[30],"mu/m":[31],"process":[32],"on":[33],"an":[34],"implementation":[35],"powered":[36],"2":[38],"V":[39],"and":[40,49,55],"consuming":[41],"2.4":[42],"mW":[43],"show":[44],"both":[45],"DC":[46],"loop":[47],"gain":[48],"CMRR":[50,69],"higher":[51,72],"than":[52,73],"110":[53],"dB":[54],"gain-bandwidth":[57],"product":[58],"of":[59],"about":[60],"40":[61],"MHz.":[62],"Compared":[63],"to":[64],"the":[65,68],"traditional":[66],"solution,":[67],"improvement":[70],"50":[74],"dB.":[75]},"counts_by_year":[],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}