{"id":"https://openalex.org/W4291909716","doi":"https://doi.org/10.1109/ecai54874.2022.9847464","title":"An Improved Algorithm for an Efficient VLSI Implementation of Type IV DST using Short Quasi-Band Correlation Structures","display_name":"An Improved Algorithm for an Efficient VLSI Implementation of Type IV DST using Short Quasi-Band Correlation Structures","publication_year":2022,"publication_date":"2022-06-30","ids":{"openalex":"https://openalex.org/W4291909716","doi":"https://doi.org/10.1109/ecai54874.2022.9847464"},"language":"en","primary_location":{"id":"doi:10.1109/ecai54874.2022.9847464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecai54874.2022.9847464","pdf_url":null,"source":{"id":"https://openalex.org/S4363608455","display_name":"2022 14th International Conference on Electronics, Computers and Artificial Intelligence (ECAI)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 14th International Conference on Electronics, Computers and Artificial Intelligence (ECAI)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009246558","display_name":"Doru Florin Chiper","orcid":"https://orcid.org/0000-0002-3322-4663"},"institutions":[{"id":"https://openalex.org/I4210108695","display_name":"Gheorghe Asachi Technical University of Ia\u0219i","ror":"https://ror.org/014zxnz40","country_code":"RO","type":"education","lineage":["https://openalex.org/I4210108695"]},{"id":"https://openalex.org/I33800924","display_name":"Academy of Romanian Scientists","ror":"https://ror.org/04ybnj478","country_code":"RO","type":"facility","lineage":["https://openalex.org/I33800924"]}],"countries":["RO"],"is_corresponding":true,"raw_author_name":"Doru Florin Chiper","raw_affiliation_strings":["Technical University &#x201C;Gh. Asachi&#x201D;, Iasi,Dept. of Applied Electronics,Iasi,Romania","Academy of Romanian Scientists, AOSR","Technical Sciences Academy of Romania, ASTR"],"affiliations":[{"raw_affiliation_string":"Technical University &#x201C;Gh. Asachi&#x201D;, Iasi,Dept. of Applied Electronics,Iasi,Romania","institution_ids":["https://openalex.org/I4210108695"]},{"raw_affiliation_string":"Academy of Romanian Scientists, AOSR","institution_ids":["https://openalex.org/I33800924"]},{"raw_affiliation_string":"Technical Sciences Academy of Romania, ASTR","institution_ids":["https://openalex.org/I33800924"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083212073","display_name":"Laura-Teodora Cotorobai","orcid":null},"institutions":[{"id":"https://openalex.org/I4210108695","display_name":"Gheorghe Asachi Technical University of Ia\u0219i","ror":"https://ror.org/014zxnz40","country_code":"RO","type":"education","lineage":["https://openalex.org/I4210108695"]}],"countries":["RO"],"is_corresponding":false,"raw_author_name":"Laura-Teodora Cotorobai","raw_affiliation_strings":["Technical University &#x201C;Gh. Asachi&#x201D;, Iasi,Dept. of Applied Electronics,Iasi,Romania"],"affiliations":[{"raw_affiliation_string":"Technical University &#x201C;Gh. Asachi&#x201D;, Iasi,Dept. of Applied Electronics,Iasi,Romania","institution_ids":["https://openalex.org/I4210108695"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5009246558"],"corresponding_institution_ids":["https://openalex.org/I33800924","https://openalex.org/I4210108695"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.05655608,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"43","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11233","display_name":"Advanced Adaptive Filtering Techniques","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2206","display_name":"Computational Mechanics"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9933000206947327,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8524740934371948},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6812995076179504},{"id":"https://openalex.org/keywords/computational-complexity-theory","display_name":"Computational complexity theory","score":0.6264772415161133},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5870306491851807},{"id":"https://openalex.org/keywords/modularity","display_name":"Modularity (biology)","score":0.5293056964874268},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5037094950675964},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4658072590827942},{"id":"https://openalex.org/keywords/systolic-array","display_name":"Systolic array","score":0.4436449110507965},{"id":"https://openalex.org/keywords/algorithm-design","display_name":"Algorithm design","score":0.43972572684288025},{"id":"https://openalex.org/keywords/discrete-cosine-transform","display_name":"Discrete cosine transform","score":0.42258167266845703},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3391892910003662},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1298505663871765},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09244707226753235},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07231611013412476}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8524740934371948},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6812995076179504},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.6264772415161133},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5870306491851807},{"id":"https://openalex.org/C2779478453","wikidata":"https://www.wikidata.org/wiki/Q6889748","display_name":"Modularity (biology)","level":2,"score":0.5293056964874268},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5037094950675964},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4658072590827942},{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.4436449110507965},{"id":"https://openalex.org/C106516650","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm design","level":2,"score":0.43972572684288025},{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.42258167266845703},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3391892910003662},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1298505663871765},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09244707226753235},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07231611013412476},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C54355233","wikidata":"https://www.wikidata.org/wiki/Q7162","display_name":"Genetics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ecai54874.2022.9847464","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ecai54874.2022.9847464","pdf_url":null,"source":{"id":"https://openalex.org/S4363608455","display_name":"2022 14th International Conference on Electronics, Computers and Artificial Intelligence (ECAI)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 14th International Conference on Electronics, Computers and Artificial Intelligence (ECAI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1536599844","https://openalex.org/W1604949508","https://openalex.org/W1914525569","https://openalex.org/W1971118267","https://openalex.org/W2093708924","https://openalex.org/W2107632140","https://openalex.org/W2110790980","https://openalex.org/W2123601828","https://openalex.org/W2142131433","https://openalex.org/W2144640755","https://openalex.org/W2474351579","https://openalex.org/W2477582050","https://openalex.org/W3182954980"],"related_works":["https://openalex.org/W2165313046","https://openalex.org/W2022568231","https://openalex.org/W2094130026","https://openalex.org/W2143176207","https://openalex.org/W2038682752","https://openalex.org/W2592499194","https://openalex.org/W1988237207","https://openalex.org/W2142131433","https://openalex.org/W2160876944","https://openalex.org/W2382729611"],"abstract_inverted_index":{"This":[0],"paper":[1,49],"introduces":[2],"an":[3,8,54,116],"improved":[4,42],"algorithm":[5,19,43],"used":[6],"for":[7,53],"efficient":[9,55,117],"VLSI":[10,58,118],"implementation":[11,56,119],"of":[12,83,125],"type":[13],"IV":[14],"Discrete":[15],"Sine":[16],"Transform.":[17],"The":[18,41,90],"has":[20,60],"a":[21,25,61,66,80,87],"low":[22,62,81,88],"complexity":[23],"from":[24],"computational":[26,100],"perspective":[27],"and":[28,124],"it":[29],"can":[30,103],"be":[31,104],"implemented":[32],"efficiently":[33,106],"in":[34,47,57],"parallel":[35],"by":[36,78,121,130],"using":[37,79,131],"linear":[38,73],"systolic":[39,74,108],"arrays.":[40],"that":[44,59,110],"is":[45,50,76],"proposed":[46,91],"this":[48],"the":[51,72,132],"key":[52],"hardware":[63],"complexity,":[64],"offering":[65],"high":[67],"throughput,":[68],"whose":[69],"mapping":[70],"on":[71,107],"arrays":[75,109],"done":[77],"number":[82],"I/O":[84],"channels":[85],"with":[86],"bandwidth.":[89],"method":[92],"uses":[93],"6":[94],"short":[95,127],"quasi-band":[96],"correlations":[97],"which":[98,102],"are":[99,111],"structures":[101,134],"mapped":[105],"linear,":[112],"thus":[113],"leading":[114],"to":[115],"characterized":[120],"regularity,":[122],"modularity":[123],"course":[126],"interconnections":[128],"offered":[129],"aforementioned":[133]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
