{"id":"https://openalex.org/W2538350080","doi":"https://doi.org/10.1109/ebccsp.2016.7605284","title":"Optimized design of successive approximation time-to-digital converter with single set of delay lines","display_name":"Optimized design of successive approximation time-to-digital converter with single set of delay lines","publication_year":2016,"publication_date":"2016-06-01","ids":{"openalex":"https://openalex.org/W2538350080","doi":"https://doi.org/10.1109/ebccsp.2016.7605284","mag":"2538350080"},"language":"en","primary_location":{"id":"doi:10.1109/ebccsp.2016.7605284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ebccsp.2016.7605284","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 Second International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033753824","display_name":"Dariusz Ko\u015bcielnik","orcid":"https://orcid.org/0000-0001-7338-4760"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Dariusz Koscielnik","raw_affiliation_strings":["Akademia Gorniczo-Hutnicza imienia Stanislawa Staszica w Krakowie, Krakow, Wojew\u00c3\u00b3dztwo ma\u00c5\u201aopolskie, PL","Akademia Gorniczo-Hutnicza imienia Stanislawa Staszica w Krakowie, Krakow, Wojew\u00f3dztwo ma\u0142opolskie, PL"],"affiliations":[{"raw_affiliation_string":"Akademia Gorniczo-Hutnicza imienia Stanislawa Staszica w Krakowie, Krakow, Wojew\u00c3\u00b3dztwo ma\u00c5\u201aopolskie, PL","institution_ids":[]},{"raw_affiliation_string":"Akademia Gorniczo-Hutnicza imienia Stanislawa Staszica w Krakowie, Krakow, Wojew\u00f3dztwo ma\u0142opolskie, PL","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005382387","display_name":"Jakub Szyduczy\u0144ski","orcid":"https://orcid.org/0000-0001-8513-7687"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Jakub Szyduczynski","raw_affiliation_strings":["AGH University of Science and Technology, Krak\u00f3w, Poland"],"affiliations":[{"raw_affiliation_string":"AGH University of Science and Technology, Krak\u00f3w, Poland","institution_ids":["https://openalex.org/I686019"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015334411","display_name":"Dominik Rzepka","orcid":"https://orcid.org/0000-0002-1159-2502"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Dominik Rzepka","raw_affiliation_strings":["AGH University of Science and Technology, Krak\u00f3w, Poland"],"affiliations":[{"raw_affiliation_string":"AGH University of Science and Technology, Krak\u00f3w, Poland","institution_ids":["https://openalex.org/I686019"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067952803","display_name":"Wojciech Andrysiewicz","orcid":"https://orcid.org/0000-0001-6381-9126"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Wojciech Andrysiewicz","raw_affiliation_strings":["AGH University of Science and Technology, Krak\u00f3w, Poland"],"affiliations":[{"raw_affiliation_string":"AGH University of Science and Technology, Krak\u00f3w, Poland","institution_ids":["https://openalex.org/I686019"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080762932","display_name":"Marek Mi\u015bkowicz","orcid":"https://orcid.org/0000-0003-3737-4690"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Marek Miskowicz","raw_affiliation_strings":["AGH University of Science and Technology, Krak\u00f3w, Poland"],"affiliations":[{"raw_affiliation_string":"AGH University of Science and Technology, Krak\u00f3w, Poland","institution_ids":["https://openalex.org/I686019"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5033753824"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7351,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.75468167,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9940000176429749,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/time-to-digital-converter","display_name":"Time-to-digital converter","score":0.8229987621307373},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6078971028327942},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6072379350662231},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5698627233505249},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.49549567699432373},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.48273321986198425},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4813402593135834},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.45862242579460144},{"id":"https://openalex.org/keywords/integral-nonlinearity","display_name":"Integral nonlinearity","score":0.43942055106163025},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.38271647691726685},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2299843430519104},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2239398956298828},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21822616457939148},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.18852975964546204},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.1404552459716797}],"concepts":[{"id":"https://openalex.org/C99594498","wikidata":"https://www.wikidata.org/wiki/Q2434524","display_name":"Time-to-digital converter","level":4,"score":0.8229987621307373},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6078971028327942},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6072379350662231},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5698627233505249},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.49549567699432373},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.48273321986198425},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4813402593135834},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.45862242579460144},{"id":"https://openalex.org/C130829357","wikidata":"https://www.wikidata.org/wiki/Q1665386","display_name":"Integral nonlinearity","level":4,"score":0.43942055106163025},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.38271647691726685},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2299843430519104},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2239398956298828},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21822616457939148},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.18852975964546204},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.1404552459716797},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ebccsp.2016.7605284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ebccsp.2016.7605284","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 Second International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6299999952316284,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W28292401","https://openalex.org/W1945151080","https://openalex.org/W2013566079","https://openalex.org/W2031498229","https://openalex.org/W2050026026","https://openalex.org/W2064962291","https://openalex.org/W2101004723","https://openalex.org/W2126344173","https://openalex.org/W2152144298","https://openalex.org/W2477175076","https://openalex.org/W2884519067","https://openalex.org/W4232143692"],"related_works":["https://openalex.org/W3144720315","https://openalex.org/W2141767635","https://openalex.org/W1985125590","https://openalex.org/W2237891095","https://openalex.org/W2584698272","https://openalex.org/W2896143804","https://openalex.org/W3193786683","https://openalex.org/W2571098816","https://openalex.org/W2027271865","https://openalex.org/W2290610940"],"abstract_inverted_index":{"The":[0,17,48],"paper":[1,49,81],"addresses":[2],"the":[3,20,29,38,43,58,80,90],"problems":[4],"of":[5,7,19,37,45,54,57,65,86,89,110,112,120],"design":[6,111],"picosecond":[8],"resolution":[9,88],"time-to-digital":[10],"converter":[11,91],"based":[12],"on":[13,52],"successive":[14,27],"approximation":[15],"(SA-TDC).":[16],"principle":[18],"conversion":[21,121],"process":[22],"in":[23,26,68,103,117],"SA-TDC":[24,59],"consists":[25],"delaying":[28],"events":[30],"defining":[31],"a":[32,35,62,118],"start":[33],"and":[34,74],"stop":[36],"input":[39],"time":[40,87],"interval":[41],"by":[42,99],"use":[44],"binary-weighted":[46],"delays.":[47],"is":[50,83],"focused":[51],"optimization":[53],"particular":[55],"components":[56,114],"architecture":[60],"with":[61],"single":[63],"set":[64],"delay":[66],"lines":[67],"order":[69],"to":[70,95],"reduce":[71],"differential":[72],"(DNL)":[73],"integral":[75],"(INL)":[76],"nonlinearities.":[77],"In":[78],"particular,":[79],"contribution":[82],"an":[84],"improvement":[85],"from":[92],"25":[93],"ps":[94,97],"12.5":[96],"(i.e.,":[98],"one":[100],"extra":[101],"bit)":[102],"180":[104],"nm":[105],"CMOS":[106],"technology":[107],"through":[108],"enhancements":[109],"circuit":[113],"which":[115],"results":[116],"reduction":[119],"errors.":[122]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
