{"id":"https://openalex.org/W2806977884","doi":"https://doi.org/10.1109/dtis.2018.8368552","title":"Dynamic partial reconfiguration verification using assertion based verification","display_name":"Dynamic partial reconfiguration verification using assertion based verification","publication_year":2018,"publication_date":"2018-04-01","ids":{"openalex":"https://openalex.org/W2806977884","doi":"https://doi.org/10.1109/dtis.2018.8368552","mag":"2806977884"},"language":"en","primary_location":{"id":"doi:10.1109/dtis.2018.8368552","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2018.8368552","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 13th International Conference on Design &amp; Technology of Integrated Systems In Nanoscale Era (DTIS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089926026","display_name":"Islam Ahmed","orcid":"https://orcid.org/0009-0009-0223-5149"},"institutions":[{"id":"https://openalex.org/I105695857","display_name":"Siemens (Hungary)","ror":"https://ror.org/01rk7mv85","country_code":"HU","type":"company","lineage":["https://openalex.org/I105695857","https://openalex.org/I1325886976"]}],"countries":["HU"],"is_corresponding":true,"raw_author_name":"Islam Ahmed","raw_affiliation_strings":["IC Verification Solutions, Mentor Graphics, a Siemens Business, Cairo, Egypt"],"affiliations":[{"raw_affiliation_string":"IC Verification Solutions, Mentor Graphics, a Siemens Business, Cairo, Egypt","institution_ids":["https://openalex.org/I105695857"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063929219","display_name":"Hassan Mostafa","orcid":"https://orcid.org/0000-0003-0043-5007"},"institutions":[{"id":"https://openalex.org/I145487455","display_name":"Cairo University","ror":"https://ror.org/03q21mh05","country_code":"EG","type":"education","lineage":["https://openalex.org/I145487455"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Hassan Mostafa","raw_affiliation_strings":["Electronics and Communications Engineering Department, Cairo University, Giza, Egypt"],"affiliations":[{"raw_affiliation_string":"Electronics and Communications Engineering Department, Cairo University, Giza, Egypt","institution_ids":["https://openalex.org/I145487455"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012834813","display_name":"Ahmed N. Mohieldin","orcid":"https://orcid.org/0000-0001-7500-4514"},"institutions":[{"id":"https://openalex.org/I145487455","display_name":"Cairo University","ror":"https://ror.org/03q21mh05","country_code":"EG","type":"education","lineage":["https://openalex.org/I145487455"]}],"countries":["EG"],"is_corresponding":false,"raw_author_name":"Ahmed Nader Mohieldin","raw_affiliation_strings":["Electronics and Communications Engineering Department, Cairo University, Giza, Egypt"],"affiliations":[{"raw_affiliation_string":"Electronics and Communications Engineering Department, Cairo University, Giza, Egypt","institution_ids":["https://openalex.org/I145487455"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5089926026"],"corresponding_institution_ids":["https://openalex.org/I105695857"],"apc_list":null,"apc_paid":null,"fwci":0.7574,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.68222928,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"v2016","issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.9408254623413086},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7517886161804199},{"id":"https://openalex.org/keywords/assertion","display_name":"Assertion","score":0.7114322781562805},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6910579204559326},{"id":"https://openalex.org/keywords/initialization","display_name":"Initialization","score":0.6884745359420776},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5754090547561646},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5250306725502014},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.453890323638916},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3293786644935608},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.13743054866790771},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11149647831916809},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.10719391703605652}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.9408254623413086},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7517886161804199},{"id":"https://openalex.org/C40422974","wikidata":"https://www.wikidata.org/wiki/Q741248","display_name":"Assertion","level":2,"score":0.7114322781562805},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6910579204559326},{"id":"https://openalex.org/C114466953","wikidata":"https://www.wikidata.org/wiki/Q6034165","display_name":"Initialization","level":2,"score":0.6884745359420776},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5754090547561646},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5250306725502014},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.453890323638916},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3293786644935608},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.13743054866790771},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11149647831916809},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.10719391703605652}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dtis.2018.8368552","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2018.8368552","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 13th International Conference on Design &amp; Technology of Integrated Systems In Nanoscale Era (DTIS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2309464846"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W4249632163","https://openalex.org/W2797161794","https://openalex.org/W2096938998","https://openalex.org/W1760305469","https://openalex.org/W2103526090","https://openalex.org/W1574948540"],"abstract_inverted_index":{"Dynamic":[0],"Partial":[1],"Reconfiguration":[2],"(DPR)":[3],"on":[4,64,115],"Field":[5],"Programmable":[6],"Gate":[7],"Arrays":[8],"(FPGAs)":[9],"allows":[10,29],"reconfiguration":[11,77,87],"of":[12,14,22,71,81],"some":[13],"the":[15,20,23,30,72,76,82,86],"logic":[16,24],"at":[17],"runtime":[18],"while":[19],"rest":[21],"keeps":[25],"operating.":[26],"This":[27,91],"feature":[28],"designers":[31],"to":[32,52,96],"build":[33],"complex":[34],"systems":[35],"such":[36,58],"as":[37,59],"Software":[38],"Defined":[39],"Radio":[40],"(SDR)":[41],"in":[42,112],"a":[43,65,94],"reasonable":[44],"area.":[45],"However,":[46],"utilizing":[47],"DPR":[48,120],"needs":[49],"extra":[50],"care":[51],"be":[53],"taken":[54],"for":[55,61],"new":[56],"issues":[57,101,114],"waiting":[60],"running":[62],"computations":[63],"module":[66,84],"before":[67],"reconfiguring":[68],"it,":[69],"isolation":[70],"reconfigurable":[73,83],"modules":[74],"during":[75],"process,":[78],"and":[79],"initialization":[80],"after":[85],"process":[88],"is":[89],"done.":[90],"paper":[92],"proposes":[93],"technique":[95,109],"verify":[97],"these":[98],"newly":[99],"introduced":[100],"using":[102],"Assertion":[103],"Based":[104],"Verification":[105],"(ABV).":[106],"The":[107],"proposed":[108],"proves":[110],"effectiveness":[111],"finding":[113],"real":[116],"designs":[117],"that":[118],"utilize":[119],"technique.":[121]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
