{"id":"https://openalex.org/W2614829594","doi":"https://doi.org/10.1109/dtis.2017.7929872","title":"Interconnect networks for resistive computing architectures","display_name":"Interconnect networks for resistive computing architectures","publication_year":2017,"publication_date":"2017-04-01","ids":{"openalex":"https://openalex.org/W2614829594","doi":"https://doi.org/10.1109/dtis.2017.7929872","mag":"2614829594"},"language":"en","primary_location":{"id":"doi:10.1109/dtis.2017.7929872","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2017.7929872","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 12th International Conference on Design &amp; Technology of Integrated Systems In Nanoscale Era (DTIS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052786273","display_name":"Hoang Anh Du Nguyen","orcid":"https://orcid.org/0000-0002-4618-7371"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":true,"raw_author_name":"H.A. Du Nguyen","raw_affiliation_strings":["Laboratory of Computer Engineering, Delft University of Technology, Delft, Netherlands"],"affiliations":[{"raw_affiliation_string":"Laboratory of Computer Engineering, Delft University of Technology, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101446253","display_name":"Lei Xie","orcid":"https://orcid.org/0000-0002-4188-5015"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Lei Xie","raw_affiliation_strings":["Laboratory of Computer Engineering, Delft University of Technology, The Netherlands"],"affiliations":[{"raw_affiliation_string":"Laboratory of Computer Engineering, Delft University of Technology, The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070958947","display_name":"Jintao Yu","orcid":"https://orcid.org/0000-0001-8764-7779"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Jintao Yu","raw_affiliation_strings":["Laboratory of Computer Engineering, Delft University of Technology, The Netherlands"],"affiliations":[{"raw_affiliation_string":"Laboratory of Computer Engineering, Delft University of Technology, The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5042250419","display_name":"Mottaqiallah Taouil","orcid":"https://orcid.org/0000-0002-9911-4846"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Mottaqiallah Taouil","raw_affiliation_strings":["Laboratory of Computer Engineering, Delft University of Technology, The Netherlands"],"affiliations":[{"raw_affiliation_string":"Laboratory of Computer Engineering, Delft University of Technology, The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005739146","display_name":"Said Hamdioui","orcid":"https://orcid.org/0000-0002-8961-0387"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Said Hamdioui","raw_affiliation_strings":["Laboratory of Computer Engineering, Delft University of Technology, The Netherlands"],"affiliations":[{"raw_affiliation_string":"Laboratory of Computer Engineering, Delft University of Technology, The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5052786273"],"corresponding_institution_ids":["https://openalex.org/I98358874"],"apc_list":null,"apc_paid":null,"fwci":0.2867,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.5781494,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.8206782341003418},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7289994955062866},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.7072457671165466},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6965387463569641},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.6926476955413818},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5628969669342041},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.4856380522251129},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.4242985248565674},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.41608747839927673},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.41140204668045044},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.364467591047287},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3390088677406311},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.22787785530090332},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21626457571983337},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14851462841033936},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1004442572593689}],"concepts":[{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.8206782341003418},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7289994955062866},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.7072457671165466},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6965387463569641},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.6926476955413818},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5628969669342041},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.4856380522251129},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.4242985248565674},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.41608747839927673},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.41140204668045044},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.364467591047287},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3390088677406311},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.22787785530090332},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21626457571983337},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14851462841033936},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1004442572593689},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dtis.2017.7929872","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2017.7929872","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 12th International Conference on Design &amp; Technology of Integrated Systems In Nanoscale Era (DTIS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1001141960","https://openalex.org/W1526568018","https://openalex.org/W1546655658","https://openalex.org/W1582848023","https://openalex.org/W2061071837","https://openalex.org/W2081729575","https://openalex.org/W2090413838","https://openalex.org/W2107969613","https://openalex.org/W2110404619","https://openalex.org/W2141849037","https://openalex.org/W2216132385","https://openalex.org/W2345622364","https://openalex.org/W2519088389","https://openalex.org/W2613051255","https://openalex.org/W4254901135","https://openalex.org/W4255812374","https://openalex.org/W6632698520","https://openalex.org/W6704402733","https://openalex.org/W6726550762"],"related_works":["https://openalex.org/W3164474614","https://openalex.org/W2171130799","https://openalex.org/W2005875039","https://openalex.org/W2015477599","https://openalex.org/W2548135880","https://openalex.org/W2144085790","https://openalex.org/W3177379469","https://openalex.org/W2516929886","https://openalex.org/W4253441086","https://openalex.org/W2942778963"],"abstract_inverted_index":{"Today's":[0],"computing":[1],"systems":[2],"suffer":[3],"from":[4],"a":[5,49,97,104,117],"memory/communication":[6],"bottleneck,":[7],"resulting":[8],"in":[9,20,38,120,129],"high":[10],"energy":[11,133],"consumption":[12],"and":[13,36,83,125,134],"saturated":[14],"performance.":[15,66],"This":[16,67],"makes":[17],"them":[18],"inefficient":[19],"solving":[21],"data-intensive":[22],"applications":[23],"at":[24],"reasonable":[25],"cost.":[26],"Computation-In-Memory":[27],"(CIM)":[28],"architecture,":[29],"based":[30],"on":[31],"the":[32,39,53,92,111,123],"integration":[33],"of":[34,94,131],"storage":[35],"computation":[37],"same":[40],"physical":[41],"location":[42],"using":[43],"non-volatile":[44],"memristor":[45],"crossbar":[46],"technology,":[47],"offers":[48],"potential":[50],"solution":[51],"to":[52,62],"memory":[54],"bottleneck.":[55],"An":[56],"efficient":[57],"interconnect":[58,71,87,113,127],"network":[59,72,88,114],"is":[60,101],"essential":[61],"maximize":[63],"CIM's":[64],"architectural":[65],"paper":[68],"presents":[69],"three":[70],"schemes":[73],"for":[74],"CIM":[75,98],"architecture;":[76],"these":[77],"are":[78],"(1)":[79],"CMOS-based,":[80],"(2)":[81],"memristor-based":[82,126],"(3)":[84],"hybrid":[85,112],"cmos/memristor":[86],"scheme.":[89],"To":[90],"illustrate":[91],"feasibility":[93],"such":[95],"schemes,":[96],"parallel":[99],"adder":[100],"used":[102],"as":[103],"case":[105],"study.":[106],"The":[107],"results":[108],"show":[109],"that":[110],"scheme":[115,128],"achieves":[116],"higher":[118],"performance":[119],"comparison":[121],"with":[122],"CMOS-based":[124],"terms":[130],"delay,":[132],"area.":[135]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
