{"id":"https://openalex.org/W2417227776","doi":"https://doi.org/10.1109/dtis.2016.7483883","title":"FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis","display_name":"FPGA implementations of HEVC sub-pixel interpolation using high-level synthesis","publication_year":2016,"publication_date":"2016-04-01","ids":{"openalex":"https://openalex.org/W2417227776","doi":"https://doi.org/10.1109/dtis.2016.7483883","mag":"2417227776"},"language":"en","primary_location":{"id":"doi:10.1109/dtis.2016.7483883","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2016.7483883","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021211016","display_name":"Firas Abdul Ghani","orcid":"https://orcid.org/0000-0003-0032-6484"},"institutions":[{"id":"https://openalex.org/I134235054","display_name":"Sabanc\u0131 \u00dcniversitesi","ror":"https://ror.org/049asqa32","country_code":"TR","type":"education","lineage":["https://openalex.org/I134235054"]}],"countries":["TR"],"is_corresponding":true,"raw_author_name":"Firas Abdul Ghani","raw_affiliation_strings":["Faculty of Engineering and Natural Sciences, Sabanci University, Istanbul, Turkey"],"affiliations":[{"raw_affiliation_string":"Faculty of Engineering and Natural Sciences, Sabanci University, Istanbul, Turkey","institution_ids":["https://openalex.org/I134235054"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007443112","display_name":"Ercan Kalal\u0131","orcid":"https://orcid.org/0000-0002-5467-5674"},"institutions":[{"id":"https://openalex.org/I134235054","display_name":"Sabanc\u0131 \u00dcniversitesi","ror":"https://ror.org/049asqa32","country_code":"TR","type":"education","lineage":["https://openalex.org/I134235054"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Ercan Kalali","raw_affiliation_strings":["Faculty of Engineering and Natural Sciences, Sabanci University, Istanbul, Turkey"],"affiliations":[{"raw_affiliation_string":"Faculty of Engineering and Natural Sciences, Sabanci University, Istanbul, Turkey","institution_ids":["https://openalex.org/I134235054"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018819924","display_name":"\u0130lker Hamzao\u011flu","orcid":"https://orcid.org/0000-0002-6491-689X"},"institutions":[{"id":"https://openalex.org/I134235054","display_name":"Sabanc\u0131 \u00dcniversitesi","ror":"https://ror.org/049asqa32","country_code":"TR","type":"education","lineage":["https://openalex.org/I134235054"]}],"countries":["TR"],"is_corresponding":false,"raw_author_name":"Ilker Hamzaoglu","raw_affiliation_strings":["Faculty of Engineering and Natural Sciences, Sabanci University, Istanbul, Turkey"],"affiliations":[{"raw_affiliation_string":"Faculty of Engineering and Natural Sciences, Sabanci University, Istanbul, Turkey","institution_ids":["https://openalex.org/I134235054"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5021211016"],"corresponding_institution_ids":["https://openalex.org/I134235054"],"apc_list":null,"apc_paid":null,"fwci":2.0174,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.87352626,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8235433101654053},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.8067586421966553},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8010125160217285},{"id":"https://openalex.org/keywords/pixel","display_name":"Pixel","score":0.6281376481056213},{"id":"https://openalex.org/keywords/interpolation","display_name":"Interpolation (computer graphics)","score":0.5528407692909241},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.545379102230072},{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.5053198933601379},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.44602057337760925},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43165507912635803},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42555394768714905},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.38447150588035583},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.18878695368766785},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08157104253768921}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8235433101654053},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.8067586421966553},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8010125160217285},{"id":"https://openalex.org/C160633673","wikidata":"https://www.wikidata.org/wiki/Q355198","display_name":"Pixel","level":2,"score":0.6281376481056213},{"id":"https://openalex.org/C137800194","wikidata":"https://www.wikidata.org/wiki/Q11713455","display_name":"Interpolation (computer graphics)","level":3,"score":0.5528407692909241},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.545379102230072},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.5053198933601379},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.44602057337760925},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43165507912635803},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42555394768714905},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.38447150588035583},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.18878695368766785},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08157104253768921},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C104114177","wikidata":"https://www.wikidata.org/wiki/Q79782","display_name":"Motion (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dtis.2016.7483883","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2016.7483883","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1604677972","https://openalex.org/W1838550990","https://openalex.org/W1919071401","https://openalex.org/W1968563851","https://openalex.org/W1978730053","https://openalex.org/W1995483768","https://openalex.org/W2001254103","https://openalex.org/W2029597957","https://openalex.org/W2040830471","https://openalex.org/W2063660172","https://openalex.org/W2085699367","https://openalex.org/W2095761111","https://openalex.org/W2106207411","https://openalex.org/W2132363810","https://openalex.org/W2213316204","https://openalex.org/W2532107927","https://openalex.org/W6636206109","https://openalex.org/W6642403002"],"related_works":["https://openalex.org/W2120447654","https://openalex.org/W2977179488","https://openalex.org/W2144453115","https://openalex.org/W2128223750","https://openalex.org/W4238532390","https://openalex.org/W2188872161","https://openalex.org/W2002978035","https://openalex.org/W2364622490","https://openalex.org/W2612099726","https://openalex.org/W2160632767"],"abstract_inverted_index":{"Sub-pixel":[0],"interpolation":[1,52,67],"is":[2,61,69],"one":[3],"of":[4,10,33,46,113],"the":[5,42,59,81,100],"most":[6],"computationally":[7],"intensive":[8],"parts":[9],"High":[11],"Efficiency":[12],"Video":[13],"Coding":[14],"(HEVC)":[15],"video":[16,91,115],"encoder":[17],"and":[18,50],"decoder.":[19],"High-level":[20],"synthesis":[21],"(HLS)":[22],"tools":[23,106],"are":[24],"started":[25],"to":[26],"be":[27,108],"successfully":[28],"used":[29,109],"for":[30,110],"FPGA":[31,44,101,111],"implementations":[32],"digital":[34],"signal":[35],"processing":[36],"algorithms.":[37],"Therefore,":[38,104],"in":[39,58,80],"this":[40],"paper,":[41],"first":[43],"implementation":[45,112],"HEVC":[47,65,114],"sub-pixel":[48,66],"(half-pixel":[49],"quarter-pixel)":[51],"algorithm":[53],"using":[54,74],"a":[55],"HLS":[56,77,96,105],"tool":[57,97],"literature":[60],"proposed.":[62],"The":[63],"proposed":[64],"hardware":[68],"implemented":[70],"on":[71],"Xilinx":[72,75],"FPGAs":[73],"Vivado":[76],"tool.":[78],"It,":[79],"worst":[82],"case,":[83],"can":[84,107],"process":[85],"45":[86],"quad":[87],"full":[88],"HD":[89],"(3840\u00d72160)":[90],"frames":[92],"per":[93],"second.":[94],"Using":[95],"significantly":[98],"reduced":[99],"development":[102],"time.":[103],"encoder.":[116]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2}],"updated_date":"2026-02-25T23:00:34.991745","created_date":"2025-10-10T00:00:00"}