{"id":"https://openalex.org/W2415692461","doi":"https://doi.org/10.1109/dtis.2016.7483805","title":"A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing","display_name":"A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing","publication_year":2016,"publication_date":"2016-04-01","ids":{"openalex":"https://openalex.org/W2415692461","doi":"https://doi.org/10.1109/dtis.2016.7483805","mag":"2415692461"},"language":"en","primary_location":{"id":"doi:10.1109/dtis.2016.7483805","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2016.7483805","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://ris.utwente.nl/ws/files/5377061/Lifetime_prediction_paper_DTIS_final_20_mar_16.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101990819","display_name":"Yong Zhao","orcid":"https://orcid.org/0000-0002-5617-0004"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Yong Zhao","raw_affiliation_strings":["Testable Design and Test of Integrated Systems (TDT) Group, Centre for Telematics and Information Technology (CTIT), The Netherlands"],"affiliations":[{"raw_affiliation_string":"Testable Design and Test of Integrated Systems (TDT) Group, Centre for Telematics and Information Technology (CTIT), The Netherlands","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5063280452","display_name":"Hans G. Kerkhoff","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Hans G. Kerkhoff","raw_affiliation_strings":["Testable Design and Test of Integrated Systems (TDT) Group, Centre for Telematics and Information Technology (CTIT), The Netherlands"],"affiliations":[{"raw_affiliation_string":"Testable Design and Test of Integrated Systems (TDT) Group, Centre for Telematics and Information Technology (CTIT), The Netherlands","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101990819"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2874,"has_fulltext":true,"cited_by_count":8,"citation_normalized_percentile":{"value":0.78489387,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"344","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.8344990015029907},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.692011833190918},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.5523381233215332},{"id":"https://openalex.org/keywords/genetic-algorithm","display_name":"Genetic algorithm","score":0.5304994583129883},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5206474661827087},{"id":"https://openalex.org/keywords/construct","display_name":"Construct (python library)","score":0.5111320614814758},{"id":"https://openalex.org/keywords/delay-calculation","display_name":"Delay calculation","score":0.44430646300315857},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3885158598423004},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3697103261947632},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.19502854347229004}],"concepts":[{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.8344990015029907},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.692011833190918},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.5523381233215332},{"id":"https://openalex.org/C8880873","wikidata":"https://www.wikidata.org/wiki/Q187787","display_name":"Genetic algorithm","level":2,"score":0.5304994583129883},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5206474661827087},{"id":"https://openalex.org/C2780801425","wikidata":"https://www.wikidata.org/wiki/Q5164392","display_name":"Construct (python library)","level":2,"score":0.5111320614814758},{"id":"https://openalex.org/C174086752","wikidata":"https://www.wikidata.org/wiki/Q5253471","display_name":"Delay calculation","level":3,"score":0.44430646300315857},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3885158598423004},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3697103261947632},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.19502854347229004},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/dtis.2016.7483805","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2016.7483805","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS)","raw_type":"proceedings-article"},{"id":"pmh:oai:ris.utwente.nl:publications/f721bc0e-7c7c-4977-ac8a-99549360aced","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/f721bc0e-7c7c-4977-ac8a-99549360aced","pdf_url":"https://ris.utwente.nl/ws/files/5377061/Lifetime_prediction_paper_DTIS_final_20_mar_16.pdf","source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Kerkhoff, H G 2016, A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing. in Y Zhao (ed.), International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. IEEE, Piscataway, NJ, USA, pp. 10-14, International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016, Istanbul, Turkey, 12/04/16. https://doi.org/10.1109/DTIS.2016.7483805","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:ris.utwente.nl:publications/f721bc0e-7c7c-4977-ac8a-99549360aced","is_oa":false,"landing_page_url":null,"pdf_url":null,"source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":""}],"best_oa_location":{"id":"pmh:oai:ris.utwente.nl:publications/f721bc0e-7c7c-4977-ac8a-99549360aced","is_oa":true,"landing_page_url":"https://research.utwente.nl/en/publications/f721bc0e-7c7c-4977-ac8a-99549360aced","pdf_url":"https://ris.utwente.nl/ws/files/5377061/Lifetime_prediction_paper_DTIS_final_20_mar_16.pdf","source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Kerkhoff, H G 2016, A genetic algorithm based remaining lifetime prediction for a VLIW processor employing path delay and IDDX testing. in Y Zhao (ed.), International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016. IEEE, Piscataway, NJ, USA, pp. 10-14, International Conference on Design and Technology of Integrated Systems in Nanoscale Era, DTIS 2016, Istanbul, Turkey, 12/04/16. https://doi.org/10.1109/DTIS.2016.7483805","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6700000166893005,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2415692461.pdf","grobid_xml":"https://content.openalex.org/works/W2415692461.grobid-xml"},"referenced_works_count":9,"referenced_works":["https://openalex.org/W1659842140","https://openalex.org/W1860417695","https://openalex.org/W1959150230","https://openalex.org/W2011679445","https://openalex.org/W2171448651","https://openalex.org/W2188512402","https://openalex.org/W2795854098","https://openalex.org/W3098336475","https://openalex.org/W6687335442"],"related_works":["https://openalex.org/W1897551170","https://openalex.org/W4237406352","https://openalex.org/W2000139719","https://openalex.org/W2164795702","https://openalex.org/W2171145238","https://openalex.org/W1534779213","https://openalex.org/W2051693290","https://openalex.org/W2069631845","https://openalex.org/W2533183463","https://openalex.org/W2141450494"],"abstract_inverted_index":{"In":[0],"this":[1,27],"paper,":[2],"critical":[3],"path-delay":[4],"time,":[5],"and":[6,8,45],"quiescent":[7],"transient":[9],"power-supply":[10,74],"current":[11,46],"testing":[12,75],"have":[13],"been":[14,40],"applied":[15],"to":[16,21,59,78],"a":[17,55,61],"90nm":[18],"VLIW":[19],"processor,":[20],"predict":[22],"the":[23,66],"remaining":[24,70],"lifetime":[25,62,71],"of":[26,80],"processor.":[28,67],"The":[29,42,68],"test":[30,38],"environment":[31],"for":[32,65],"validation,":[33],"via":[34],"implementing":[35],"an":[36],"accelerated":[37],"has":[39],"realized.":[41],"resulting":[43],"delay":[44],"measurement":[47],"data":[48],"is":[49,76],"presented":[50],"next,":[51],"followed":[52],"by":[53,73],"applying":[54],"genetic":[56],"algorithm":[57],"(GA)":[58],"construct":[60],"prediction":[63],"model":[64],"calculated":[69],"predicted":[72],"close":[77],"that":[79],"delay-time":[81],"testing.":[82]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2026-03-17T17:19:04.345684","created_date":"2016-06-24T00:00:00"}