{"id":"https://openalex.org/W2010230343","doi":"https://doi.org/10.1109/dtis.2013.6527785","title":"Capturing and mitigating the NBTI effect during the design flow for extensible processors","display_name":"Capturing and mitigating the NBTI effect during the design flow for extensible processors","publication_year":2013,"publication_date":"2013-03-01","ids":{"openalex":"https://openalex.org/W2010230343","doi":"https://doi.org/10.1109/dtis.2013.6527785","mag":"2010230343"},"language":"en","primary_location":{"id":"doi:10.1109/dtis.2013.6527785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2013.6527785","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042809860","display_name":"Mehdi Kamal","orcid":"https://orcid.org/0000-0001-7098-6440"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"M. Kamal","raw_affiliation_strings":["School of Electrical and Computer Engineering, University of Tehran, Iran","[Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, University of Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]},{"raw_affiliation_string":"[Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074063358","display_name":"Ali Afzali\u2010Kusha","orcid":"https://orcid.org/0000-0001-8614-2007"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Ali Afzali-Kusha","raw_affiliation_strings":["School of Electrical and Computer Engineering, University of Tehran, Iran","[Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, University of Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]},{"raw_affiliation_string":"[Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071789164","display_name":"Saeed Safari","orcid":"https://orcid.org/0000-0001-6940-591X"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"S. Safari","raw_affiliation_strings":["School of Electrical and Computer Engineering, University of Tehran, Iran","[Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, University of Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]},{"raw_affiliation_string":"[Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044650311","display_name":"Massoud Pedram","orcid":"https://orcid.org/0000-0002-2677-7307"},"institutions":[{"id":"https://openalex.org/I1174212","display_name":"University of Southern California","ror":"https://ror.org/03taz7m60","country_code":"US","type":"education","lineage":["https://openalex.org/I1174212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Pedram","raw_affiliation_strings":["Electrical Engineering Department, University of Southern California, USA","Electr. Eng. Dept., Univ. of Southern California, Los Angeles, CA, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, University of Southern California, USA","institution_ids":["https://openalex.org/I1174212"]},{"raw_affiliation_string":"Electr. Eng. Dept., Univ. of Southern California, Los Angeles, CA, USA#TAB#","institution_ids":["https://openalex.org/I1174212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051597259","display_name":"B. Eghbalkhah","orcid":null},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"B. Eghbalkhah","raw_affiliation_strings":["School of Electrical and Computer Engineering, University of Tehran, Iran","[Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, University of Tehran, Iran","institution_ids":["https://openalex.org/I23946033"]},{"raw_affiliation_string":"[Sch. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran]","institution_ids":["https://openalex.org/I23946033"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"25","issue":null,"first_page":"94","last_page":"97"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/extensibility","display_name":"Extensibility","score":0.8535447716712952},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7513654828071594},{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.60546875},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.599126935005188},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.529079020023346},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.48257747292518616},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4406488537788391},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.44048455357551575},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4137870967388153},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3410126566886902},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3376657962799072},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.16972723603248596},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10011598467826843},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.07862460613250732}],"concepts":[{"id":"https://openalex.org/C32833848","wikidata":"https://www.wikidata.org/wiki/Q4115054","display_name":"Extensibility","level":2,"score":0.8535447716712952},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7513654828071594},{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.60546875},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.599126935005188},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.529079020023346},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.48257747292518616},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4406488537788391},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.44048455357551575},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4137870967388153},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3410126566886902},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3376657962799072},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.16972723603248596},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10011598467826843},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.07862460613250732},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dtis.2013.6527785","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dtis.2013.6527785","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 8th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6100000143051147}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1500589160","https://openalex.org/W1686420892","https://openalex.org/W2022985968","https://openalex.org/W2164178706","https://openalex.org/W2170333286","https://openalex.org/W3146062159","https://openalex.org/W6637151178","https://openalex.org/W6684298975"],"related_works":["https://openalex.org/W1948607442","https://openalex.org/W3004004161","https://openalex.org/W2044615423","https://openalex.org/W4247766898","https://openalex.org/W4244765761","https://openalex.org/W2361584951","https://openalex.org/W2091330445","https://openalex.org/W3168383044","https://openalex.org/W2129507101","https://openalex.org/W4231800022"],"abstract_inverted_index":{"This":[0],"paper":[1],"studies":[2],"the":[3,6,11,19,26,34,39,47,52,62,65,73,80,84,96,105,113,118,122,127,133,147,153,156],"impact":[4],"of":[5,29,41,54,64,115,117,126,146,155],"delay":[7,36,137],"degradation":[8,37],"arising":[9],"from":[10],"Negative":[12],"Bias":[13],"Temperature":[14],"Instability":[15],"(NTBI)":[16],"effect":[17],"on":[18,38,103,107],"extended":[20,74],"instruction":[21],"set":[22],"architecture":[23],"(ISA)":[24],"and":[25,130,141],"ALU":[27],"design":[28,49,90],"extensible":[30,42,66,148],"processors.":[31],"In":[32],"particular,":[33],"NBTI":[35,97],"performance":[40],"processors":[43,67],"is":[44,68,76],"modeled":[45],"during":[46],"conventional":[48],"flow.":[50],"While":[51],"results":[53,151],"this":[55],"study":[56],"show":[57],"that,":[58],"in":[59,70,121,143],"some":[60],"cases,":[61,72],"lifetime":[63,81],"decreased,":[69],"most":[71],"ISA":[75],"able":[77],"to":[78,83,94],"improve":[79],"compared":[82],"baseline":[85],"processor.":[86,149],"Next,":[87],"three":[88],"different":[89],"flows":[91,100],"are":[92,101,139],"presented":[93],"lower":[95],"effect.":[98],"These":[99],"based":[102],"reducing":[104],"stress":[106],"custom":[108],"instructions":[109],"(CIs)":[110],"by":[111,131],"considering":[112],"number":[114],"occurrences":[116],"selected":[119],"CIs":[120,134],"data":[123],"flow":[124],"graph":[125],"target":[128],"application":[129],"pruning":[132],"whose":[135],"NBTI-induced":[136],"degradations":[138],"large":[140],"result":[142],"slow":[144],"down":[145],"Experimental":[150],"assess":[152],"effectiveness":[154],"proposed":[157],"methods.":[158]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}