{"id":"https://openalex.org/W3147799314","doi":"https://doi.org/10.1109/dsd.2007.4341494","title":"Low-Complexity Architectures of a Decoder for IEEE 802.16e LDPC Codes","display_name":"Low-Complexity Architectures of a Decoder for IEEE 802.16e LDPC Codes","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W3147799314","doi":"https://doi.org/10.1109/dsd.2007.4341494","mag":"3147799314"},"language":"en","primary_location":{"id":"doi:10.1109/dsd.2007.4341494","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2007.4341494","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101186446","display_name":"Giuseppe Gentile","orcid":null},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Gentile","raw_affiliation_strings":["Department of Information Engineering, University of Pisa, Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Pisa, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031862625","display_name":"Massimo Rovini","orcid":null},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Massimo Rovini","raw_affiliation_strings":["Department of Information Engineering, University of Pisa, Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Pisa, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046297500","display_name":"Luca Fanucci","orcid":"https://orcid.org/0000-0001-5426-4974"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Fanucci","raw_affiliation_strings":["Department of Information Engineering, University of Pisa, Pisa, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Pisa, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.0211,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.8871232,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"369","last_page":"375"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10125","display_name":"Advanced Wireless Communication Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10796","display_name":"Cooperative Communication and Network Coding","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/low-density-parity-check-code","display_name":"Low-density parity-check code","score":0.7729525566101074},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7597032785415649},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.6250839233398438},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.5439020395278931},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5257079005241394},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4997694492340088},{"id":"https://openalex.org/keywords/ranging","display_name":"Ranging","score":0.46161091327667236},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.460541695356369},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4521198868751526},{"id":"https://openalex.org/keywords/ieee-802","display_name":"IEEE 802","score":0.43955469131469727},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.42180556058883667},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3963382840156555},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.39247578382492065},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.38355472683906555},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37699443101882935},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.366318941116333},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.1865629255771637},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1251673400402069},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10263949632644653}],"concepts":[{"id":"https://openalex.org/C67692717","wikidata":"https://www.wikidata.org/wiki/Q187444","display_name":"Low-density parity-check code","level":3,"score":0.7729525566101074},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7597032785415649},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.6250839233398438},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.5439020395278931},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5257079005241394},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4997694492340088},{"id":"https://openalex.org/C115051666","wikidata":"https://www.wikidata.org/wiki/Q6522493","display_name":"Ranging","level":2,"score":0.46161091327667236},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.460541695356369},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4521198868751526},{"id":"https://openalex.org/C522090004","wikidata":"https://www.wikidata.org/wiki/Q616245","display_name":"IEEE 802","level":3,"score":0.43955469131469727},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.42180556058883667},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3963382840156555},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.39247578382492065},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.38355472683906555},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37699443101882935},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.366318941116333},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.1865629255771637},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1251673400402069},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10263949632644653},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/dsd.2007.4341494","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2007.4341494","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007)","raw_type":"proceedings-article"},{"id":"pmh:oai:arpi.unipi.it:11568/114065","is_oa":false,"landing_page_url":"http://hdl.handle.net/11568/114065","pdf_url":null,"source":{"id":"https://openalex.org/S4377196265","display_name":"CINECA IRIS Institutial research information system (University of Pisa)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I108290504","host_organization_name":"University of Pisa","host_organization_lineage":["https://openalex.org/I108290504"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.41999998688697815,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1480903969","https://openalex.org/W1518608438","https://openalex.org/W1572884776","https://openalex.org/W1573665190","https://openalex.org/W1576557544","https://openalex.org/W1576747764","https://openalex.org/W2046091144","https://openalex.org/W2101147641","https://openalex.org/W2102815459","https://openalex.org/W2117447277","https://openalex.org/W2121606987","https://openalex.org/W2127490352","https://openalex.org/W2133068391","https://openalex.org/W2152956478","https://openalex.org/W2158150288","https://openalex.org/W6628839894","https://openalex.org/W6675013778","https://openalex.org/W6675326518"],"related_works":["https://openalex.org/W2783354812","https://openalex.org/W4384112194","https://openalex.org/W2103009189","https://openalex.org/W4312958259","https://openalex.org/W4308259661","https://openalex.org/W4390813131","https://openalex.org/W2349383066","https://openalex.org/W4328132048","https://openalex.org/W1969901537","https://openalex.org/W2376202349"],"abstract_inverted_index":{"Low-density":[0],"parity-check":[1],"(LDPC)":[2],"codes":[3,10,32],"have":[4],"recently":[5],"been":[6],"included":[7],"as":[8],"error-correcting":[9],"in":[11,60],"IEEE":[12],"802.16e,":[13],"for":[14],"wireless":[15],"metropolitan":[16],"area":[17,112],"networks.":[18],"This":[19],"paper":[20],"proposes":[21],"a":[22,52,83,110],"flexible,":[23],"low-complexity":[24],"LDPC":[25],"decoder":[26,38],"fully":[27],"compliant":[28],"with":[29,55,128],"all":[30],"114":[31],"defined":[33],"by":[34,91],"the":[35,40,46,64,97,122],"standard.":[36],"The":[37,79],"runs":[39],"layered":[41],"decoding":[42],"algorithm":[43],"to":[44,62,88],"increase":[45],"convergence":[47],"speed,":[48],"and":[49,72],"relies":[50],"on":[51,104],"semi-parallel":[53],"implementation":[54],"serial":[56],"processing":[57],"units":[58],"working":[59],"pipeline":[61],"reduce":[63],"latency.":[65],"Particularly,":[66],"two":[67],"different":[68],"architectures":[69],"are":[70,77],"considered,":[71],"their":[73],"RTL/memory":[74],"complexity":[75],"tradeoffs":[76],"analyzed.":[78],"resulting":[80],"design":[81],"yields":[82],"throughput":[84],"ranging":[85],"from":[86],"93":[87],"497":[89],"Mbps":[90],"means":[92],"of":[93,100],"15":[94],"iterations":[95],"at":[96],"clock":[98],"frequency":[99],"400":[101],"MHz.":[102],"Synthesis":[103],"65":[105],"nm":[106],"CMOS":[107],"technology,":[108],"shows":[109],"chip":[111],"less":[113],"than":[114],"0.59":[115],"mm":[116],"<sup":[117],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[118],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[119],",":[120],"despite":[121],"high":[123],"flexibility,":[124],"which":[125],"compares":[126],"favourably":[127],"similar":[129],"implementations.":[130]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
