{"id":"https://openalex.org/W3148402870","doi":"https://doi.org/10.1109/dsd.2007.4341493","title":"Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems","display_name":"Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W3148402870","doi":"https://doi.org/10.1109/dsd.2007.4341493","mag":"3148402870"},"language":"en","primary_location":{"id":"doi:10.1109/dsd.2007.4341493","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2007.4341493","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072010925","display_name":"Nicola E. L\u2019Insalata","orcid":null},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Nicola E. L'Insalata","raw_affiliation_strings":["Department of Information Engineering, University of Pisa, Pisa, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Pisa, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091706301","display_name":"Sergio Saponara","orcid":"https://orcid.org/0000-0001-6724-4219"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Sergio Saponara","raw_affiliation_strings":["Department of Information Engineering, University of Pisa, Pisa, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Pisa, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046297500","display_name":"Luca Fanucci","orcid":"https://orcid.org/0000-0001-5426-4974"},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Fanucci","raw_affiliation_strings":["Department of Information Engineering, University of Pisa, Pisa, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Pisa, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039369665","display_name":"Pierangelo Terreni","orcid":null},"institutions":[{"id":"https://openalex.org/I108290504","display_name":"University of Pisa","ror":"https://ror.org/03ad39j10","country_code":"IT","type":"education","lineage":["https://openalex.org/I108290504"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Pierangelo Terreni","raw_affiliation_strings":["Department of Information Engineering, University of Pisa, Pisa, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Information Engineering, University of Pisa, Pisa, Italy","institution_ids":["https://openalex.org/I108290504"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5072010925"],"corresponding_institution_ids":["https://openalex.org/I108290504"],"apc_list":null,"apc_paid":null,"fwci":0.6331,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.72909118,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"3","issue":null,"first_page":"361","last_page":"368"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/macrocell","display_name":"Macrocell","score":0.8298794031143188},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.8059221506118774},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7859216928482056},{"id":"https://openalex.org/keywords/orthogonal-frequency-division-multiplexing","display_name":"Orthogonal frequency-division multiplexing","score":0.7530931830406189},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.6946361064910889},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5847769975662231},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5224865078926086},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5054829120635986},{"id":"https://openalex.org/keywords/block-size","display_name":"Block size","score":0.46894264221191406},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.46158912777900696},{"id":"https://openalex.org/keywords/gate-count","display_name":"Gate count","score":0.44310641288757324},{"id":"https://openalex.org/keywords/computational-complexity-theory","display_name":"Computational complexity theory","score":0.42431366443634033},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38895708322525024},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3211328983306885},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.2935601472854614},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.28995293378829956},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.25343888998031616},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.1476401388645172},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1044817864894867},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09508508443832397},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08794724941253662}],"concepts":[{"id":"https://openalex.org/C2778291847","wikidata":"https://www.wikidata.org/wiki/Q1163937","display_name":"Macrocell","level":3,"score":0.8298794031143188},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.8059221506118774},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7859216928482056},{"id":"https://openalex.org/C40409654","wikidata":"https://www.wikidata.org/wiki/Q375889","display_name":"Orthogonal frequency-division multiplexing","level":3,"score":0.7530931830406189},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.6946361064910889},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5847769975662231},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5224865078926086},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5054829120635986},{"id":"https://openalex.org/C41431624","wikidata":"https://www.wikidata.org/wiki/Q1053357","display_name":"Block size","level":3,"score":0.46894264221191406},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.46158912777900696},{"id":"https://openalex.org/C2777892113","wikidata":"https://www.wikidata.org/wiki/Q5527005","display_name":"Gate count","level":2,"score":0.44310641288757324},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.42431366443634033},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38895708322525024},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3211328983306885},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.2935601472854614},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.28995293378829956},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.25343888998031616},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.1476401388645172},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1044817864894867},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09508508443832397},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08794724941253662},{"id":"https://openalex.org/C68649174","wikidata":"https://www.wikidata.org/wiki/Q1379116","display_name":"Base station","level":2,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/dsd.2007.4341493","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2007.4341493","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007)","raw_type":"proceedings-article"},{"id":"pmh:oai:arpi.unipi.it:11568/196527","is_oa":false,"landing_page_url":"http://hdl.handle.net/11568/196527","pdf_url":null,"source":{"id":"https://openalex.org/S4377196265","display_name":"CINECA IRIS Institutial research information system (University of Pisa)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I108290504","host_organization_name":"University of Pisa","host_organization_lineage":["https://openalex.org/I108290504"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.46000000834465027}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321873","display_name":"Ministero dell\u2019Istruzione, dell\u2019Universit\u00e0 e della Ricerca","ror":"https://ror.org/0166hxq48"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W102052539","https://openalex.org/W1483577138","https://openalex.org/W1591232781","https://openalex.org/W1920841064","https://openalex.org/W1923763959","https://openalex.org/W2002533296","https://openalex.org/W2009105504","https://openalex.org/W2019654111","https://openalex.org/W2029360173","https://openalex.org/W2038436327","https://openalex.org/W2056791977","https://openalex.org/W2085251573","https://openalex.org/W2108970115","https://openalex.org/W2110661067","https://openalex.org/W2115228192","https://openalex.org/W2144148168","https://openalex.org/W2153815029","https://openalex.org/W2160468481","https://openalex.org/W2168847677","https://openalex.org/W2621302375","https://openalex.org/W6604102176","https://openalex.org/W6640355072"],"related_works":["https://openalex.org/W4200437691","https://openalex.org/W2359926786","https://openalex.org/W2609406488","https://openalex.org/W1989550343","https://openalex.org/W2151474035","https://openalex.org/W2541229443","https://openalex.org/W174870362","https://openalex.org/W2014236389","https://openalex.org/W2149549148","https://openalex.org/W2563718006"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"environment":[4,76,115],"for":[5,108],"the":[6,47,50,59,65,72,75,90,113,128],"automatic":[7,109],"generation":[8],"of":[9,74,89],"FFT/IFFT":[10],"cores.":[11],"The":[12,41],"cores":[13],"are":[14,93],"derived":[15],"from":[16],"a":[17,96],"pipelined":[18],"cascade":[19],"architecture":[20],"template":[21],"supporting":[22],"run-time":[23],"programmable":[24],"length,":[25],"transform":[26,134],"type":[27],"selection":[28],"and":[29,37,45,85,136],"three":[30],"different":[31],"machine":[32],"arithmetics":[33,44],"(fixed-point,":[34],"block":[35,39],"floating-point":[36],"convergent":[38],"floating-point).":[40],"tool":[42],"profiles":[43],"generate":[46],"macrocell":[48],"with":[49,105,118],"minimum":[51,55],"operands":[52],"bit-width":[53],"(hence":[54],"circuit":[56,120],"complexity)":[57],"within":[58],"numerical":[60,137],"accuracy":[61],"budget":[62],"given":[63],"by":[64],"target":[66],"application.":[67],"Four":[68],"case":[69],"studies":[70],"illustrate":[71],"use":[73],"in":[77],"multi-band":[78],"OFDM":[79],"communication":[80],"systems":[81],"(WLAN,":[82],"xDSL,":[83],"DVB-T/H":[84],"UWB).":[86],"Implementation":[87],"results":[88],"generated":[91],"macrocells":[92,117],"evaluated":[94],"on":[95],"65":[97],"nm":[98],"CMOS":[99],"standard":[100],"cells":[101],"library.":[102],"When":[103],"compared":[104],"other":[106],"tools":[107],"FFT":[110],"core":[111],"generation,":[112],"proposed":[114],"produces":[116],"lower":[119],"complexity":[121],"(gate":[122],"count,":[123],"RAM/ROM":[124],"bits)":[125],"while":[126],"keeping":[127],"same":[129],"system":[130],"level":[131],"performance":[132],"(throughput,":[133],"size":[135],"accuracy).":[138]},"counts_by_year":[{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}