{"id":"https://openalex.org/W4232601010","doi":"https://doi.org/10.1109/dsd.2007.4341449","title":"A resource optimized Processor Core for FPGA based SoCs","display_name":"A resource optimized Processor Core for FPGA based SoCs","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W4232601010","doi":"https://doi.org/10.1109/dsd.2007.4341449"},"language":"en","primary_location":{"id":"doi:10.1109/dsd.2007.4341449","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2007.4341449","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046466505","display_name":"Gerald Hempel","orcid":"https://orcid.org/0000-0002-4737-8612"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Gerald Hempel","raw_affiliation_strings":["Embedded Systems, Dresden University of Technology, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Embedded Systems, Dresden University of Technology, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005076278","display_name":"Christian Hochberger","orcid":"https://orcid.org/0000-0001-5516-7826"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Christian Hochberger","raw_affiliation_strings":["Embedded Systems, Dresden University of Technology, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Embedded Systems, Dresden University of Technology, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5046466505"],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":0.3167,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.68446168,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"51","last_page":"58"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/microblaze","display_name":"MicroBlaze","score":0.9288945198059082},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8563027381896973},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.737506628036499},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7296380996704102},{"id":"https://openalex.org/keywords/nios-ii","display_name":"Nios II","score":0.7065128684043884},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.5519822239875793},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4935392141342163},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.44239863753318787},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4203604757785797},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.41367143392562866},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34091341495513916},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23640206456184387}],"concepts":[{"id":"https://openalex.org/C2777575374","wikidata":"https://www.wikidata.org/wiki/Q1644704","display_name":"MicroBlaze","level":3,"score":0.9288945198059082},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8563027381896973},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.737506628036499},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7296380996704102},{"id":"https://openalex.org/C2781190120","wikidata":"https://www.wikidata.org/wiki/Q438281","display_name":"Nios II","level":3,"score":0.7065128684043884},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.5519822239875793},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4935392141342163},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.44239863753318787},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4203604757785797},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.41367143392562866},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34091341495513916},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23640206456184387}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dsd.2007.4341449","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2007.4341449","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.41999998688697815}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1535637329","https://openalex.org/W1541457918","https://openalex.org/W2532977569"],"related_works":["https://openalex.org/W2376312311","https://openalex.org/W2354823813","https://openalex.org/W2261632671","https://openalex.org/W1485756991","https://openalex.org/W2376218453","https://openalex.org/W2348913739","https://openalex.org/W2984236338","https://openalex.org/W3015372806","https://openalex.org/W2966987601","https://openalex.org/W2946438354"],"abstract_inverted_index":{"Modern":[0],"FPGAs":[1],"have":[2],"become":[3],"so":[4],"affordable":[5],"that":[6],"they":[7],"can":[8],"be":[9],"used":[10,28],"to":[11,95,113],"substitute":[12],"ASICs":[13],"in":[14,37],"mass":[15],"produced":[16],"devices.":[17],"Typically,":[18],"the":[19,42],"term":[20],"configurable":[21],"system":[22],"on":[23],"a":[24,39,62,86],"chip":[25],"(CSoC)":[26],"is":[27,41,85],"for":[29,50],"this":[30],"kind":[31],"of":[32,64,78],"usage.":[33],"A":[34],"key":[35],"component":[36],"such":[38],"CSoC":[40],"processor":[43,117],"core.":[44],"Currently,":[45],"several":[46],"cores":[47],"are":[48,75],"available":[49],"FPGAs.":[51],"32":[52],"bit":[53],"processors":[54],"like":[55,70],"MicroBlaze,":[56],"NIOS":[57],"2":[58],"or":[59,72],"OpenRisc":[60],"require":[61],"lot":[63],"resources,":[65],"whereas":[66],"very":[67],"small":[68],"solutions":[69],"PicoBlaze":[71],"Lattice":[73],"Mico8":[74],"not":[76],"capable":[77],"running":[79],"reasonably":[80],"complex":[81],"software.":[82],"Thus,":[83],"there":[84],"gap":[87],"between":[88],"these":[89],"two":[90],"extremes,":[91],"which":[92],"we":[93],"want":[94],"fill":[96],"with":[97],"our":[98],"development":[99],"SpartanMC.":[100],"This":[101],"contribution":[102],"describes":[103],"its":[104],"design":[105],"objectives,":[106],"architecture,":[107],"tools,":[108],"peripherals":[109],"and":[110],"compares":[111],"it":[112],"other":[114],"well":[115],"known":[116],"cores.":[118]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}