{"id":"https://openalex.org/W4246843485","doi":"https://doi.org/10.1109/dsd.2004.1333283","title":"Partially reconfigurable matrix multiplication for area and time efficiency on FPGAs","display_name":"Partially reconfigurable matrix multiplication for area and time efficiency on FPGAs","publication_year":2004,"publication_date":"2004-01-01","ids":{"openalex":"https://openalex.org/W4246843485","doi":"https://doi.org/10.1109/dsd.2004.1333283"},"language":"en","primary_location":{"id":"doi:10.1109/dsd.2004.1333283","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2004.1333283","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2004. DSD 2004.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084231233","display_name":"Jianwen Luo","orcid":"https://orcid.org/0000-0001-9215-5568"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Luo Jianwen","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018516888","display_name":"Ching Chuen Jong","orcid":"https://orcid.org/0000-0003-1178-9062"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Jong Ching Chuen","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5084231233"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":0.4635,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.74301847,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"40","issue":null,"first_page":"244","last_page":"248"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/matrix-multiplication","display_name":"Matrix multiplication","score":0.8056680560112},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7335411310195923},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6908713579177856},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6778889894485474},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.614159882068634},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.5784558653831482},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5093683004379272},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.48665910959243774},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.43268316984176636},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.43158161640167236},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3090595602989197},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.17880108952522278},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.17822995781898499}],"concepts":[{"id":"https://openalex.org/C17349429","wikidata":"https://www.wikidata.org/wiki/Q1049914","display_name":"Matrix multiplication","level":3,"score":0.8056680560112},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7335411310195923},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6908713579177856},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6778889894485474},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.614159882068634},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.5784558653831482},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5093683004379272},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.48665910959243774},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.43268316984176636},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.43158161640167236},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3090595602989197},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.17880108952522278},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.17822995781898499},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C84114770","wikidata":"https://www.wikidata.org/wiki/Q46344","display_name":"Quantum","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dsd.2004.1333283","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2004.1333283","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2004. DSD 2004.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6200000047683716,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1820726733","https://openalex.org/W1925692259","https://openalex.org/W2110656410"],"related_works":["https://openalex.org/W2133942601","https://openalex.org/W2204754129","https://openalex.org/W3099313426","https://openalex.org/W4287593139","https://openalex.org/W4322751528","https://openalex.org/W752783541","https://openalex.org/W1506547947","https://openalex.org/W2759209791","https://openalex.org/W4206811032","https://openalex.org/W2995605830"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"architecture":[4],"for":[5,29,69,95,126],"matrix":[6,35,70],"multiplication":[7],"implemented":[8],"on":[9],"reconfigurable":[10,14],"hardware":[11],"with":[12,38,98,113],"partially":[13],"feature.":[15],"The":[16,82,118],"proposed":[17],"design":[18,42,51,86,111,122],"significantly":[19],"reduces":[20],"the":[21,25,30,39,47,57,110,114],"size":[22,71],"and":[23,63,77,101],"achieves":[24],"minimum":[26,115],"computation":[27],"cycles":[28],"n":[31,34],"/spl":[32,74,79],"times/":[33,75,80],"multiplication.":[36],"Compared":[37],"linear":[40],"array":[41],"(Jang":[43],"et":[44],"al.,":[45],"2002)":[46],"area":[48,62,102],"of":[49,61,84,120],"our":[50,85,121],"is":[52,65,87,123],"reduced":[53,66],"by":[54,67],"72%-81%":[55],"while":[56],"AT":[58],"metrics":[59],"(product":[60],"latency)":[64],"40%-58%":[68],"between":[72],"3":[73,76],"48":[78],"48.":[81],"versatility":[83],"demonstrated":[88],"in":[89],"different":[90,96],"parameterisable":[91],"instantiation":[92],"to":[93,108],"cater":[94],"implementations":[97],"various":[99],"time":[100],"requirements.":[103],"Partially":[104],"reconfiguration":[105],"allows":[106],"us":[107],"reload":[109],"contents":[112],"configuration":[116],"overhead.":[117],"performance":[119],"even":[124],"better":[125],"larger":[127],"matrices.":[128]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
