{"id":"https://openalex.org/W4232173532","doi":"https://doi.org/10.1109/dsd.2004.1333278","title":"IP-block based integration of very high performance WLAN modem","display_name":"IP-block based integration of very high performance WLAN modem","publication_year":2004,"publication_date":"2004-01-01","ids":{"openalex":"https://openalex.org/W4232173532","doi":"https://doi.org/10.1109/dsd.2004.1333278"},"language":"en","primary_location":{"id":"doi:10.1109/dsd.2004.1333278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2004.1333278","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2004. DSD 2004.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072134073","display_name":"Jussi Roivainen","orcid":null},"institutions":[{"id":"https://openalex.org/I87653560","display_name":"VTT Technical Research Centre of Finland","ror":"https://ror.org/04b181w54","country_code":"FI","type":"nonprofit","lineage":["https://openalex.org/I4210089493","https://openalex.org/I87653560"]}],"countries":["FI"],"is_corresponding":true,"raw_author_name":"J. Roivainen","raw_affiliation_strings":["VTT Electronics, Oulu, Finland"],"affiliations":[{"raw_affiliation_string":"VTT Electronics, Oulu, Finland","institution_ids":["https://openalex.org/I87653560"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5000974704","display_name":"Jari Rautio","orcid":null},"institutions":[{"id":"https://openalex.org/I87653560","display_name":"VTT Technical Research Centre of Finland","ror":"https://ror.org/04b181w54","country_code":"FI","type":"nonprofit","lineage":["https://openalex.org/I4210089493","https://openalex.org/I87653560"]}],"countries":["FI"],"is_corresponding":false,"raw_author_name":"J. Rautio","raw_affiliation_strings":["VTT Electronics, Oulu, Finland"],"affiliations":[{"raw_affiliation_string":"VTT Electronics, Oulu, Finland","institution_ids":["https://openalex.org/I87653560"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5072134073"],"corresponding_institution_ids":["https://openalex.org/I87653560"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.39938168,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"200","last_page":"207"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7291462421417236},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.7037501335144043},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.6050741076469421},{"id":"https://openalex.org/keywords/system-integration","display_name":"System integration","score":0.5610795021057129},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5431316494941711},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4634418785572052},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4528270363807678},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4466462731361389},{"id":"https://openalex.org/keywords/control","display_name":"Control (management)","score":0.43942126631736755},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.36385107040405273},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15939685702323914},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09032654762268066}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7291462421417236},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.7037501335144043},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.6050741076469421},{"id":"https://openalex.org/C19527686","wikidata":"https://www.wikidata.org/wiki/Q1665453","display_name":"System integration","level":2,"score":0.5610795021057129},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5431316494941711},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4634418785572052},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4528270363807678},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4466462731361389},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.43942126631736755},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.36385107040405273},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15939685702323914},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09032654762268066},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dsd.2004.1333278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2004.1333278","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2004. DSD 2004.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.46000000834465027,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1498455513","https://openalex.org/W1529130237","https://openalex.org/W1535749512","https://openalex.org/W2019600156","https://openalex.org/W2503657378","https://openalex.org/W4234584516","https://openalex.org/W6816604847"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W3042736233","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2160474882","https://openalex.org/W2353989877"],"abstract_inverted_index":{"In":[0,45],"the":[1,5,30,39,50,60,69,94,97],"IP-block":[2,17],"based":[3],"design":[4,32],"problems":[6,62],"of":[7,27],"integration":[8,56,61,70,84],"work":[9,71,98],"have":[10],"not":[11],"been":[12],"discussed":[13],"as":[14,16],"thoroughly":[15],"development,":[18],"system":[19],"development":[20],"or":[21],"physical":[22],"designing":[23],"problems.":[24],"The":[25,66,82],"complexity":[26,103],"controlling":[28],"is":[29,99,109],"major":[31],"challenge,":[33],"especially":[34],"in":[35,68],"communication":[36],"devices":[37],"where":[38],"network":[40],"sets":[41],"parameters":[42],"for":[43,57,112],"control.":[44],"this":[46],"paper,":[47],"we":[48],"present":[49],"FAR":[51],"(Flexible,":[52],"Adaptive,":[53],"Reconfigurable)":[54],"demonstrator":[55],"FPGA":[58],"platform,":[59],"and":[63,79,92],"lessons":[64],"learned.":[65],"challenges":[67],"are":[72],"identified,":[73],"including":[74],"complexity,":[75],"interface":[76],"style":[77],"diversity":[78],"control":[80],"requirements.":[81],"incremental":[83],"approach":[85],"was":[86],"found":[87],"effective":[88,105],"strategy":[89],"to":[90,101],"manage":[91,102],"solve":[93],"challenges.":[95],"Dividing":[96],"required":[100],"but":[104],"co-operation":[106],"with":[107],"designers":[108],"a":[110],"necessity":[111],"preventing":[113],"new":[114],"artificial":[115],"interfaces.":[116]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
