{"id":"https://openalex.org/W2144380657","doi":"https://doi.org/10.1109/dsd.2003.1231960","title":"Testable design verification using Petri nets","display_name":"Testable design verification using Petri nets","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W2144380657","doi":"https://doi.org/10.1109/dsd.2003.1231960","mag":"2144380657"},"language":"en","primary_location":{"id":"doi:10.1109/dsd.2003.1231960","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2003.1231960","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"R. Ruzicka","orcid":null},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":true,"raw_author_name":"R. Ruzicka","raw_affiliation_strings":["Brno University of Technology, Brno, Czech Republic","[Fac. of Inf. Technol., Brno Univ. of Technol., Czech Republic]"],"affiliations":[{"raw_affiliation_string":"Brno University of Technology, Brno, Czech Republic","institution_ids":["https://openalex.org/I60587646"]},{"raw_affiliation_string":"[Fac. of Inf. Technol., Brno Univ. of Technol., Czech Republic]","institution_ids":["https://openalex.org/I60587646"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I60587646"],"apc_list":null,"apc_paid":null,"fwci":0.2566,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.58205397,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"304","last_page":"311"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9896000027656555,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9853000044822693,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/petri-net","display_name":"Petri net","score":0.8643090128898621},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.7656027674674988},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7633349299430847},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5861779451370239},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5430547595024109},{"id":"https://openalex.org/keywords/element","display_name":"Element (criminal law)","score":0.5100005865097046},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.46936848759651184},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3983253240585327},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3629828989505768},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3426555395126343},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.34255993366241455},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.32073384523391724},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.27523836493492126},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13522282242774963},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0959731936454773}],"concepts":[{"id":"https://openalex.org/C38677869","wikidata":"https://www.wikidata.org/wiki/Q724168","display_name":"Petri net","level":2,"score":0.8643090128898621},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.7656027674674988},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7633349299430847},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5861779451370239},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5430547595024109},{"id":"https://openalex.org/C200288055","wikidata":"https://www.wikidata.org/wiki/Q2621792","display_name":"Element (criminal law)","level":2,"score":0.5100005865097046},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.46936848759651184},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3983253240585327},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3629828989505768},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3426555395126343},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.34255993366241455},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.32073384523391724},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.27523836493492126},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13522282242774963},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0959731936454773},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dsd.2003.1231960","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2003.1231960","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2003. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W603405442","https://openalex.org/W1593445040","https://openalex.org/W2001642815","https://openalex.org/W2078888330","https://openalex.org/W2113355185","https://openalex.org/W2125761888","https://openalex.org/W2936804578","https://openalex.org/W4249538237"],"related_works":["https://openalex.org/W2107525390","https://openalex.org/W2157191248","https://openalex.org/W2164493372","https://openalex.org/W2114980936","https://openalex.org/W2142405811","https://openalex.org/W1594445436","https://openalex.org/W2128920253","https://openalex.org/W2164349885","https://openalex.org/W1768820276","https://openalex.org/W2107690753"],"abstract_inverted_index":{"In":[0],"the":[1,43,59,74],"paper,":[2],"a":[3,14,16,40,67,71,82],"method":[4,31],"for":[5,89,100],"formal":[6],"verification":[7],"of":[8,36,42,52,73],"testable":[9],"design":[10],"is":[11,28,62],"presented.":[12],"As":[13],"input,":[15],"digital":[17],"circuit":[18,68,75],"structure":[19],"at":[20],"RT":[21],"level":[22],"designed":[23],"using":[24],"any":[25],"DfT":[26],"technique":[27],"assumed.":[29],"Proposed":[30],"enables":[32],"to":[33,64],"verify":[34],"testability":[35],"each":[37],"element":[38,69],"or":[39,70,95],"part":[41,72],"circuit.":[44],"Petri":[45,53],"Net":[46,54],"based":[47],"model":[48],"and":[49,97],"common":[50],"methods":[51],"analysis":[55],"are":[56,93],"utilized.":[57],"On":[58],"model,":[60],"it":[61],"possible":[63],"prove,":[65],"if":[66,86,98],"under":[76],"test":[77],"can":[78],"be":[79],"tested":[80],"by":[81],"selected":[83],"way":[84],"-":[85],"paths,":[87],"chosen":[88],"diagnostic":[90],"data":[91],"transport,":[92],"passable":[94],"not":[96],"not,":[99],"what":[101],"reason.":[102]},"counts_by_year":[],"updated_date":"2026-03-25T23:56:10.502304","created_date":"2025-10-10T00:00:00"}