{"id":"https://openalex.org/W2171516458","doi":"https://doi.org/10.1109/dsd.2003.1231924","title":"A novel specification model for IP-based design","display_name":"A novel specification model for IP-based design","publication_year":2003,"publication_date":"2003-01-01","ids":{"openalex":"https://openalex.org/W2171516458","doi":"https://doi.org/10.1109/dsd.2003.1231924","mag":"2171516458"},"language":"en","primary_location":{"id":"doi:10.1109/dsd.2003.1231924","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2003.1231924","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2003. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028577300","display_name":"Stephan Klaus","orcid":null},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"S. Klaus","raw_affiliation_strings":["Integrated Circuits and Systems Laboratory Department of Computer Science, Darmstadt University of Technology, Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"Integrated Circuits and Systems Laboratory Department of Computer Science, Darmstadt University of Technology, Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109870848","display_name":"Sorin A. Huss","orcid":null},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"S.A. Huss","raw_affiliation_strings":["Integrated Circuits and Systems Laboratory Department of Computer Science, Darmstadt University of Technology, Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"Integrated Circuits and Systems Laboratory Department of Computer Science, Darmstadt University of Technology, Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5028577300"],"corresponding_institution_ids":["https://openalex.org/I31512782"],"apc_list":null,"apc_paid":null,"fwci":0.9894,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.78206806,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"145","issue":null,"first_page":"190","last_page":"196"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8174517154693604},{"id":"https://openalex.org/keywords/reuse","display_name":"Reuse","score":0.6326180100440979},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.516811728477478},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5078731179237366},{"id":"https://openalex.org/keywords/formal-specification","display_name":"Formal specification","score":0.49913883209228516},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.47377920150756836},{"id":"https://openalex.org/keywords/encapsulation","display_name":"Encapsulation (networking)","score":0.4562699496746063},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.43843790888786316},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3842352330684662},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3530879020690918},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2973300814628601}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8174517154693604},{"id":"https://openalex.org/C206588197","wikidata":"https://www.wikidata.org/wiki/Q846574","display_name":"Reuse","level":2,"score":0.6326180100440979},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.516811728477478},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5078731179237366},{"id":"https://openalex.org/C116253237","wikidata":"https://www.wikidata.org/wiki/Q1437424","display_name":"Formal specification","level":2,"score":0.49913883209228516},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.47377920150756836},{"id":"https://openalex.org/C81147070","wikidata":"https://www.wikidata.org/wiki/Q1172449","display_name":"Encapsulation (networking)","level":2,"score":0.4562699496746063},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.43843790888786316},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3842352330684662},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3530879020690918},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2973300814628601},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/dsd.2003.1231924","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2003.1231924","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Euromicro Symposium on Digital System Design, 2003. Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.528.8794","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.528.8794","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.vlsi.informatik.tu-darmstadt.de/staff/klaus/publications/dsd03.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W960373928","https://openalex.org/W1043293026","https://openalex.org/W1717983320","https://openalex.org/W1953237395","https://openalex.org/W1982480183","https://openalex.org/W1982480778","https://openalex.org/W1993696446","https://openalex.org/W2099414645","https://openalex.org/W2099529102","https://openalex.org/W2115723749","https://openalex.org/W2122164638","https://openalex.org/W2134728278","https://openalex.org/W2138569213","https://openalex.org/W2149791895","https://openalex.org/W3144962167","https://openalex.org/W4247229772","https://openalex.org/W4256352996","https://openalex.org/W4285719527","https://openalex.org/W6625333689","https://openalex.org/W6637623739","https://openalex.org/W6677149610","https://openalex.org/W7000634168"],"related_works":["https://openalex.org/W2037960874","https://openalex.org/W1973069902","https://openalex.org/W2029518208","https://openalex.org/W2269990635","https://openalex.org/W1968547622","https://openalex.org/W4234221021","https://openalex.org/W1567432572","https://openalex.org/W2119904701","https://openalex.org/W2159184138","https://openalex.org/W3177593432"],"abstract_inverted_index":{"The":[0],"proposed":[1],"specification":[2,14,77],"method":[3],"denoted":[4],"as":[5,31,47,49,73,75],"hierarchical":[6,11],"CoDesign":[7],"Model":[8],"allows":[9],"a":[10,32],"system":[12],"level":[13],"of":[15,24,38,44,56,86,94,101],"distributed":[16],"embedded":[17],"systems":[18],"including":[19],"both":[20],"definition":[21],"and":[22,35,43,96,103],"reuse":[23],"IP":[25,71],"cores.":[26],"Input/Output":[27],"Relations":[28],"are":[29,61],"introduced":[30],"very":[33],"general":[34],"powerful":[36],"means":[37],"encapsulating":[39],"internal":[40],"implementation":[41],"details":[42],"describing":[45],"data":[46],"well":[48,74],"control":[50],"flow":[51],"information":[52],"on":[53,83],"different":[54,84],"levels":[55,85],"abstraction.":[57],"Two":[58],"novel":[59],"algorithms":[60],"proposed,":[62],"which":[63],"allow":[64],"deriving":[65],"dynamically":[66],"task":[67],"descriptions":[68],"for":[69,79],"the":[70,91,98],"encapsulation":[72],"flat":[76],"models":[78],"design":[80,104],"space":[81,105],"exploration":[82,106],"detail.":[87],"This":[88],"reduces":[89],"considerably":[90],"descriptive":[92],"complexity":[93],"specifications":[95],"therewith":[97],"execution":[99],"times":[100],"synthesis":[102],"algorithms.":[107]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}