{"id":"https://openalex.org/W2136544647","doi":"https://doi.org/10.1109/dsd.2002.1115381","title":"Constant coefficient convolution implemented in FPGAs","display_name":"Constant coefficient convolution implemented in FPGAs","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2136544647","doi":"https://doi.org/10.1109/dsd.2002.1115381","mag":"2136544647"},"language":"en","primary_location":{"id":"doi:10.1109/dsd.2002.1115381","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2002.1115381","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082630408","display_name":"E. Jamro","orcid":"https://orcid.org/0000-0003-4632-2470"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"E. Jamro","raw_affiliation_strings":["Institute of Electronics, AGH University of Science and Technology, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electronics, AGH University of Science and Technology, Poland","institution_ids":["https://openalex.org/I686019"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048697784","display_name":"K. Wiatr","orcid":"https://orcid.org/0000-0001-5959-0277"},"institutions":[{"id":"https://openalex.org/I686019","display_name":"AGH University of Krakow","ror":"https://ror.org/00bas1c41","country_code":"PL","type":"education","lineage":["https://openalex.org/I686019"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"K. Wiatr","raw_affiliation_strings":["Institute of Electronics, AGH University of Science and Technology, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electronics, AGH University of Science and Technology, Poland","institution_ids":["https://openalex.org/I686019"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3543,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.65758569,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"291","last_page":"298"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.8272997140884399},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.7477246522903442},{"id":"https://openalex.org/keywords/convolution","display_name":"Convolution (computer science)","score":0.7189034223556519},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.6813295483589172},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6712940335273743},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6652916073799133},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.6131664514541626},{"id":"https://openalex.org/keywords/constant","display_name":"Constant (computer programming)","score":0.5816226601600647},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.548538863658905},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.5444643497467041},{"id":"https://openalex.org/keywords/circular-convolution","display_name":"Circular convolution","score":0.49463459849357605},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3299601376056671},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3287150263786316},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3268612027168274},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.24642086029052734},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10372227430343628},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07250550389289856}],"concepts":[{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.8272997140884399},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.7477246522903442},{"id":"https://openalex.org/C45347329","wikidata":"https://www.wikidata.org/wiki/Q5166604","display_name":"Convolution (computer science)","level":3,"score":0.7189034223556519},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6813295483589172},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6712940335273743},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6652916073799133},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.6131664514541626},{"id":"https://openalex.org/C2777027219","wikidata":"https://www.wikidata.org/wiki/Q1284190","display_name":"Constant (computer programming)","level":2,"score":0.5816226601600647},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.548538863658905},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.5444643497467041},{"id":"https://openalex.org/C194980680","wikidata":"https://www.wikidata.org/wiki/Q245450","display_name":"Circular convolution","level":5,"score":0.49463459849357605},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3299601376056671},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3287150263786316},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3268612027168274},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.24642086029052734},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10372227430343628},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07250550389289856},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C76563020","wikidata":"https://www.wikidata.org/wiki/Q4817582","display_name":"Fractional Fourier transform","level":4,"score":0.0},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dsd.2002.1115381","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dsd.2002.1115381","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Euromicro Symposium on Digital System Design. Architectures, Methods and Tools","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1531782600","https://openalex.org/W1544481369","https://openalex.org/W1587890916","https://openalex.org/W1607038717","https://openalex.org/W1925071146","https://openalex.org/W1976709917","https://openalex.org/W2090374461","https://openalex.org/W2101932432","https://openalex.org/W2115749699","https://openalex.org/W2154656381","https://openalex.org/W2163249969","https://openalex.org/W2165743801","https://openalex.org/W2167523715","https://openalex.org/W2953745258"],"related_works":["https://openalex.org/W2510992755","https://openalex.org/W2382457518","https://openalex.org/W2151743818","https://openalex.org/W1488776355","https://openalex.org/W2080337923","https://openalex.org/W2017990332","https://openalex.org/W2553162000","https://openalex.org/W4244262766","https://openalex.org/W2148823076","https://openalex.org/W2420450432"],"abstract_inverted_index":{"This":[0],"paper":[1,76],"reviews":[2],"different":[3,16],"architectural":[4,81,106],"solutions":[5,107],"for":[6,40,101,118],"calculating":[7],"constant":[8],"coefficient":[9],"convolution":[10],"operation":[11,29],"in":[12,31,89,121],"FPGAs.":[13],"At":[14],"first,":[15],"architectures":[17],"of":[18,53,74],"multipliers":[19],"are":[20,57],"approached,":[21],"as":[22],"the":[23,26,32,36,51,54,92,115],"multiplication":[24],"is":[25,69],"most":[27],"complex":[28],"performed":[30],"convolutions.":[33],"Nevertheless,":[34],"disregarding":[35],"multiplier":[37],"entity":[38],"allows":[39,100],"further":[41],"circuit":[42,103],"optimisations.":[43],"Therefore":[44],"look-up-table":[45],"(LUT)":[46],"based":[47],"convolver":[48,67,86],"(LC)":[49],"versus":[50],"sum":[52],"LUT-based":[55],"Multipliers":[56],"described.":[58],"Further,":[59],"an":[60,95],"alternative":[61],"technique":[62],"-":[63],"(Parallel)":[64],"distributed":[65,84],"arithmetic":[66,85],"(DAC)":[68],"approached.":[70],"The":[71],"key":[72],"issue":[73],"this":[75],"is,":[77],"however,":[78],"a":[79],"novel":[80],"solution:":[82],"irregular":[83,96],"(IDAC)":[87],"which,":[88],"comparison":[90],"to":[91],"DAC,":[93],"has":[94],"form,":[97],"and":[98],"therefore":[99],"better":[102],"optimisation.":[104],"All":[105],"described":[108],"hereby":[109],"can":[110],"be":[111],"automatically":[112],"generated":[113],"by":[114],"automated":[116],"tool":[117],"generation":[119],"convolvers":[120],"FPGAs":[122],"(AuToCon).":[123]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
