{"id":"https://openalex.org/W2889508423","doi":"https://doi.org/10.1109/drc.2018.8442250","title":"On the Possibility of Dynamically Tuning and Collapsing the Ferroelectric Hysteresis/Memory Window in an Asymmetric DG MOS Device: A Path to a Reconfigurable Logic-Memory Device","display_name":"On the Possibility of Dynamically Tuning and Collapsing the Ferroelectric Hysteresis/Memory Window in an Asymmetric DG MOS Device: A Path to a Reconfigurable Logic-Memory Device","publication_year":2018,"publication_date":"2018-06-01","ids":{"openalex":"https://openalex.org/W2889508423","doi":"https://doi.org/10.1109/drc.2018.8442250","mag":"2889508423"},"language":"en","primary_location":{"id":"doi:10.1109/drc.2018.8442250","is_oa":false,"landing_page_url":"https://doi.org/10.1109/drc.2018.8442250","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 76th Device Research Conference (DRC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063840718","display_name":"Nuihat Tasneem","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Nuihat Tasneem","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049163544","display_name":"Asif Islam Khan","orcid":"https://orcid.org/0000-0003-4369-106X"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Asif I. Khan","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5063840718"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":0.515,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.67596642,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"39","issue":null,"first_page":"1","last_page":"2"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.7289347052574158},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.6965911388397217},{"id":"https://openalex.org/keywords/hysteresis","display_name":"Hysteresis","score":0.6372111439704895},{"id":"https://openalex.org/keywords/ferroelectricity","display_name":"Ferroelectricity","score":0.5825149416923523},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.5782248973846436},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.5406015515327454},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5056285858154297},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.36970192193984985},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36162298917770386},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.32515382766723633},{"id":"https://openalex.org/keywords/electrode","display_name":"Electrode","score":0.15378230810165405},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12843790650367737},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.12297245860099792}],"concepts":[{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.7289347052574158},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.6965911388397217},{"id":"https://openalex.org/C123299182","wikidata":"https://www.wikidata.org/wiki/Q190837","display_name":"Hysteresis","level":2,"score":0.6372111439704895},{"id":"https://openalex.org/C79090758","wikidata":"https://www.wikidata.org/wiki/Q1045739","display_name":"Ferroelectricity","level":3,"score":0.5825149416923523},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.5782248973846436},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.5406015515327454},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5056285858154297},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.36970192193984985},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36162298917770386},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.32515382766723633},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.15378230810165405},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12843790650367737},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.12297245860099792},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C133386390","wikidata":"https://www.wikidata.org/wiki/Q184996","display_name":"Dielectric","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/drc.2018.8442250","is_oa":false,"landing_page_url":"https://doi.org/10.1109/drc.2018.8442250","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 76th Device Research Conference (DRC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.44999998807907104,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2016106189","https://openalex.org/W2022829874","https://openalex.org/W2136288682","https://openalex.org/W2792488046"],"related_works":["https://openalex.org/W2795319754","https://openalex.org/W2248971758","https://openalex.org/W2332612935","https://openalex.org/W2410108108","https://openalex.org/W2129539607","https://openalex.org/W4327948915","https://openalex.org/W1974020084","https://openalex.org/W2079374728","https://openalex.org/W2166508075","https://openalex.org/W4376612721"],"abstract_inverted_index":{"We":[0],"propose":[1],"a":[2,63,71],"novel":[3],"device":[4,64],"architecture":[5],"based":[6],"on":[7],"ferroelectric":[8,54],"gated":[9],"double":[10],"gate":[11],"metal-oxide-semiconductor":[12],"structure":[13],"in":[14,42],"which":[15,41],"the":[16,27,35,38,45,49,53,59],"memory/hysteresis":[17],"window":[18],"can":[19,66,79],"be":[20,80],"tuned":[21],"as":[22,24],"well":[23],"collapsed":[25],"by":[26],"back-gate":[28,32],"(control":[29],"gate).":[30],"The":[31],"voltage":[33],"alters":[34],"capacitance":[36,46,51,56],"of":[37],"semiconductor":[39,50],"channel":[40],"turn":[43],"modifies":[44],"matching":[47],"between":[48],"and":[52,76],"negative":[55],"leading":[57],"to":[58],"dynamic":[60],"tunability.":[61],"Such":[62],"concept":[65],"open":[67],"up":[68],"pathways":[69],"for":[70,83],"reconfigurable":[72],"fabric":[73],"where":[74],"logic":[75],"memory":[77],"operation":[78],"tightly":[81],"integrated":[82],"data":[84],"intensive":[85],"computing.":[86]},"counts_by_year":[{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}