{"id":"https://openalex.org/W2163575144","doi":"https://doi.org/10.1109/dftvs.2003.1250115","title":"Hybrid BIST using an incrementally guided LFSR","display_name":"Hybrid BIST using an incrementally guided LFSR","publication_year":2004,"publication_date":"2004-03-02","ids":{"openalex":"https://openalex.org/W2163575144","doi":"https://doi.org/10.1109/dftvs.2003.1250115","mag":"2163575144"},"language":"en","primary_location":{"id":"doi:10.1109/dftvs.2003.1250115","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dftvs.2003.1250115","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 16th IEEE Symposium on Computer Arithmetic","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113492660","display_name":"C. Vamsi Krishna","orcid":null},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"C.V. Krishna","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Computer Engineering Research Center, University of Technology, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Computer Engineering Research Center, University of Technology, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5012356472","display_name":"Nur A. Touba","orcid":"https://orcid.org/0000-0001-5083-6701"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N.A. Touba","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Computer Engineering Research Center, University of Technology, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Computer Engineering Research Center, University of Technology, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5113492660"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":2.3768,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.88326421,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"217","last_page":"224"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13293","display_name":"Engineering and Test Systems","score":0.9835000038146973,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/linear-feedback-shift-register","display_name":"Linear feedback shift register","score":0.8330668210983276},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.7525924444198608},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.7098433971405029},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6390319466590881},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5924527049064636},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.574065089225769},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5193482637405396},{"id":"https://openalex.org/keywords/random-testing","display_name":"Random testing","score":0.4879259765148163},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.4741617739200592},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47391068935394287},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.4121229648590088},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38129764795303345},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.37981075048446655},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3567470908164978},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.237741619348526},{"id":"https://openalex.org/keywords/test-case","display_name":"Test case","score":0.1839638650417328},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.15782836079597473},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15151888132095337},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08636504411697388}],"concepts":[{"id":"https://openalex.org/C159862308","wikidata":"https://www.wikidata.org/wiki/Q681101","display_name":"Linear feedback shift register","level":4,"score":0.8330668210983276},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.7525924444198608},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.7098433971405029},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6390319466590881},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5924527049064636},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.574065089225769},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5193482637405396},{"id":"https://openalex.org/C106159264","wikidata":"https://www.wikidata.org/wiki/Q17146789","display_name":"Random testing","level":4,"score":0.4879259765148163},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.4741617739200592},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47391068935394287},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.4121229648590088},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38129764795303345},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.37981075048446655},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3567470908164978},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.237741619348526},{"id":"https://openalex.org/C128942645","wikidata":"https://www.wikidata.org/wiki/Q1568346","display_name":"Test case","level":3,"score":0.1839638650417328},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.15782836079597473},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15151888132095337},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08636504411697388},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C152877465","wikidata":"https://www.wikidata.org/wiki/Q208042","display_name":"Regression analysis","level":2,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/dftvs.2003.1250115","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dftvs.2003.1250115","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 16th IEEE Symposium on Computer Arithmetic","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.76.7825","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.76.7825","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.utexas.edu/~touba/research/dfts03c.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W197391467","https://openalex.org/W1905213452","https://openalex.org/W1934808766","https://openalex.org/W2030106932","https://openalex.org/W2097973512","https://openalex.org/W2103706706","https://openalex.org/W2111761265","https://openalex.org/W2117154146","https://openalex.org/W2119348475","https://openalex.org/W2124629389","https://openalex.org/W2137460337","https://openalex.org/W2144033909","https://openalex.org/W2153662495","https://openalex.org/W2156277179","https://openalex.org/W2581282274","https://openalex.org/W4256404229","https://openalex.org/W6607990715","https://openalex.org/W6677659376","https://openalex.org/W7075707051"],"related_works":["https://openalex.org/W2152745368","https://openalex.org/W2761125259","https://openalex.org/W2184933991","https://openalex.org/W4288754393","https://openalex.org/W2188176208","https://openalex.org/W2119351822","https://openalex.org/W2761883387","https://openalex.org/W2133482355","https://openalex.org/W2080947141","https://openalex.org/W1498635933"],"abstract_inverted_index":{"A":[0],"new":[1],"hybrid":[2],"BIST":[3],"scheme":[4],"is":[5,8,33,52],"proposed":[6,94,113],"which":[7,65],"based":[9],"on":[10],"using":[11,104],"an":[12],"\"incrementally":[13],"guided":[14],"LFSR\".":[15],"It":[16],"very":[17,34,105,116],"efficiently":[18],"combines":[19],"external":[20,91],"deterministic":[21],"data":[22],"from":[23],"the":[24,60,63,67,72,82,86,93,112],"tester":[25,68,100,123],"with":[26,54,90],"on-chip":[27,107],"pseudo-random":[28,87],"BIST.":[29],"The":[30],"hardware":[31],"overhead":[32],"small":[35,57],"as":[36],"a":[37,56],"conventional":[38],"STUMPS":[39],"architecture":[40],"(P.":[41],"H.":[42],"Bardell":[43],"et":[44],"al.,":[45],"Proc.":[46],"Int.":[47],"Test":[48],"Conf.,":[49],"p.200-204,":[50],"1982)":[51],"used":[53],"only":[55],"modification":[58],"to":[59,69],"feedback":[61],"of":[62],"LFSR":[64,73],"allows":[66],"incrementally":[70],"guide":[71],"so":[74],"that":[75,80,111],"it":[76],"can":[77],"embed":[78],"patterns":[79],"detect":[81],"random-pattern-resistant":[83],"faults":[84],"in":[85,99],"sequence.":[88],"Compared":[89],"testing,":[92],"approach":[95,114],"achieves":[96],"dramatic":[97],"reductions":[98],"storage":[101,124],"requirements":[102],"while":[103],"simple":[106],"hardware.":[108],"Results":[109],"indicate":[110],"provides":[115],"attractive":[117],"tradeoffs":[118],"between":[119],"test":[120],"length":[121],"and":[122],"requirements.":[125]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}