{"id":"https://openalex.org/W2136899941","doi":"https://doi.org/10.1109/dftvs.2002.1173537","title":"On-chip jitter measurement for phase locked loops","display_name":"On-chip jitter measurement for phase locked loops","publication_year":2003,"publication_date":"2003-06-26","ids":{"openalex":"https://openalex.org/W2136899941","doi":"https://doi.org/10.1109/dftvs.2002.1173537","mag":"2136899941"},"language":"en","primary_location":{"id":"doi:10.1109/dftvs.2002.1173537","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dftvs.2002.1173537","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002. DFT 2002. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://digitalcommons.uri.edu/ele_facpubs/803","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101630082","display_name":"Tian Xia","orcid":"https://orcid.org/0000-0001-5117-9432"},"institutions":[{"id":"https://openalex.org/I17626003","display_name":"University of Rhode Island","ror":"https://ror.org/013ckk937","country_code":"US","type":"education","lineage":["https://openalex.org/I17626003"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Tian Xia","raw_affiliation_strings":["Department of Electrical & Computer Engineering, University of Rhode Island, Kingston, RI, USA","Dept. of Electr. and Comput. Eng., Rhode Island Univ., Kingston, RI, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, University of Rhode Island, Kingston, RI, USA","institution_ids":["https://openalex.org/I17626003"]},{"raw_affiliation_string":"Dept. of Electr. and Comput. Eng., Rhode Island Univ., Kingston, RI, USA#TAB#","institution_ids":["https://openalex.org/I17626003"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108527096","display_name":"Jien-Chung Lo","orcid":null},"institutions":[{"id":"https://openalex.org/I17626003","display_name":"University of Rhode Island","ror":"https://ror.org/013ckk937","country_code":"US","type":"education","lineage":["https://openalex.org/I17626003"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jien-Chung Lo","raw_affiliation_strings":["Department of Electrical & Computer Engineering, University of Rhode Island, Kingston, RI, USA","Dept. of Electr. and Comput. Eng., Rhode Island Univ., Kingston, RI, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, University of Rhode Island, Kingston, RI, USA","institution_ids":["https://openalex.org/I17626003"]},{"raw_affiliation_string":"Dept. of Electr. and Comput. Eng., Rhode Island Univ., Kingston, RI, USA#TAB#","institution_ids":["https://openalex.org/I17626003"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5101630082"],"corresponding_institution_ids":["https://openalex.org/I17626003"],"apc_list":null,"apc_paid":null,"fwci":2.4706,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.89466764,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"399","last_page":"407"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9740225076675415},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.8235507011413574},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6301949620246887},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5143603086471558},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.48268747329711914},{"id":"https://openalex.org/keywords/charge-pump","display_name":"Charge pump","score":0.416026771068573},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27796635031700134},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23389118909835815},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21624645590782166},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10085538029670715}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9740225076675415},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.8235507011413574},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6301949620246887},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5143603086471558},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48268747329711914},{"id":"https://openalex.org/C114825011","wikidata":"https://www.wikidata.org/wiki/Q440704","display_name":"Charge pump","level":4,"score":0.416026771068573},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27796635031700134},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23389118909835815},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21624645590782166},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10085538029670715},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/dftvs.2002.1173537","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dftvs.2002.1173537","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2002. DFT 2002. Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:digitalcommons.uri.edu:ele_facpubs-1802","is_oa":true,"landing_page_url":"https://digitalcommons.uri.edu/ele_facpubs/803","pdf_url":null,"source":{"id":"https://openalex.org/S2764761010","display_name":"Journal of Media Literacy Education","issn_l":"2167-8715","issn":["2167-8715"],"is_oa":false,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310316378","host_organization_name":"National Association for Media Literacy Education","host_organization_lineage":["https://openalex.org/P4310316378"],"host_organization_lineage_names":["National Association for Media Literacy Education"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Electrical, Computer, and Biomedical Engineering Faculty Publications","raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:digitalcommons.uri.edu:ele_facpubs-1802","is_oa":true,"landing_page_url":"https://digitalcommons.uri.edu/ele_facpubs/803","pdf_url":null,"source":{"id":"https://openalex.org/S2764761010","display_name":"Journal of Media Literacy Education","issn_l":"2167-8715","issn":["2167-8715"],"is_oa":false,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310316378","host_organization_name":"National Association for Media Literacy Education","host_organization_lineage":["https://openalex.org/P4310316378"],"host_organization_lineage_names":["National Association for Media Literacy Education"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Electrical, Computer, and Biomedical Engineering Faculty Publications","raw_type":"text"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1599994156","https://openalex.org/W1932648966","https://openalex.org/W1985055504","https://openalex.org/W2028212645","https://openalex.org/W2134245421","https://openalex.org/W2161283733","https://openalex.org/W2169790941","https://openalex.org/W2175023340","https://openalex.org/W2232490671","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W1994021281","https://openalex.org/W2139484866","https://openalex.org/W2511498111","https://openalex.org/W66112532","https://openalex.org/W4385624389","https://openalex.org/W2979324006","https://openalex.org/W2409831949","https://openalex.org/W2087564251","https://openalex.org/W2369807905","https://openalex.org/W2036999063"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"propose":[4],"an":[5],"efficient":[6],"on-chip":[7,74,98],"method":[8],"for":[9,109],"the":[10,26,30,37,55,59,64,70,92],"direct":[11],"measurement":[12,100],"of":[13,32,39,43,72,91,106],"jitter":[14,21,60,71,99],"in":[15,29,36,113],"phase":[16,27],"locked":[17],"loops":[18],"(PLLs).":[19],"The":[20,83,96],"is":[22,63,87,102],"first":[23,65],"detected":[24],"as":[25],"difference":[28],"form":[31],"pulses":[33],"with":[34,80],"duration":[35],"range":[38],"pico-seconds.":[40],"A":[41],"combination":[42],"a":[44,49,103],"modified":[45],"charge":[46],"pump":[47],"and":[48],"binary":[50],"counter":[51],"can":[52],"then":[53],"record":[54],"number":[56],"that":[57],"represents":[58],"measurement.":[61],"This":[62],"attempt":[66],"to":[67],"directly":[68],"measure":[69],"PLLs":[73],"via":[75],"analog":[76],"testing":[77,85],"circuit,":[78],"but":[79],"digital":[81],"output.":[82],"proposed":[84,97],"circuit":[86,101],"only":[88],"about":[89],"20%":[90],"PLL":[93],"under":[94],"test.":[95],"central":[104],"part":[105],"built-in":[107],"self-test":[108],"many":[110],"embedded":[111],"applications":[112],"SOCs.":[114]},"counts_by_year":[{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
