{"id":"https://openalex.org/W3209397245","doi":"https://doi.org/10.1109/dft52944.2021.9568298","title":"A Codeword-based Compactor for On-Chip Generated Debug Data Using Two-Stage Artificial Neural Networks","display_name":"A Codeword-based Compactor for On-Chip Generated Debug Data Using Two-Stage Artificial Neural Networks","publication_year":2021,"publication_date":"2021-10-06","ids":{"openalex":"https://openalex.org/W3209397245","doi":"https://doi.org/10.1109/dft52944.2021.9568298","mag":"3209397245"},"language":"en","primary_location":{"id":"doi:10.1109/dft52944.2021.9568298","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft52944.2021.9568298","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069711438","display_name":"Marcel Merten","orcid":"https://orcid.org/0000-0002-6654-6773"},"institutions":[{"id":"https://openalex.org/I180437899","display_name":"University of Bremen","ror":"https://ror.org/04ers2y35","country_code":"DE","type":"education","lineage":["https://openalex.org/I180437899"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Marcel Merten","raw_affiliation_strings":["University of Bremen, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Bremen, Germany","institution_ids":["https://openalex.org/I180437899"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074091035","display_name":"Sebastian Huhn","orcid":"https://orcid.org/0000-0001-6950-7967"},"institutions":[{"id":"https://openalex.org/I180437899","display_name":"University of Bremen","ror":"https://ror.org/04ers2y35","country_code":"DE","type":"education","lineage":["https://openalex.org/I180437899"]},{"id":"https://openalex.org/I33256026","display_name":"German Research Centre for Artificial Intelligence","ror":"https://ror.org/01ayc5b57","country_code":"DE","type":"funder","lineage":["https://openalex.org/I33256026"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Sebastian Huhn","raw_affiliation_strings":["Cyber-Physical Systems, DFKI GmbH, Bremen, Germany","University of Bremen, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cyber-Physical Systems, DFKI GmbH, Bremen, Germany","institution_ids":["https://openalex.org/I33256026"]},{"raw_affiliation_string":"University of Bremen, Germany","institution_ids":["https://openalex.org/I180437899"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071742136","display_name":"Rolf Drechsler","orcid":"https://orcid.org/0000-0002-9872-1740"},"institutions":[{"id":"https://openalex.org/I180437899","display_name":"University of Bremen","ror":"https://ror.org/04ers2y35","country_code":"DE","type":"education","lineage":["https://openalex.org/I180437899"]},{"id":"https://openalex.org/I33256026","display_name":"German Research Centre for Artificial Intelligence","ror":"https://ror.org/01ayc5b57","country_code":"DE","type":"funder","lineage":["https://openalex.org/I33256026"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Rolf Drechsler","raw_affiliation_strings":["Cyber-Physical Systems, DFKI GmbH, Bremen, Germany","University of Bremen, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Cyber-Physical Systems, DFKI GmbH, Bremen, Germany","institution_ids":["https://openalex.org/I33256026"]},{"raw_affiliation_string":"University of Bremen, Germany","institution_ids":["https://openalex.org/I180437899"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4539,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.60312349,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"10","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.791530430316925},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.713077187538147},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5846385359764099},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5651881098747253},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.5332742929458618},{"id":"https://openalex.org/keywords/parameterized-complexity","display_name":"Parameterized complexity","score":0.528340220451355},{"id":"https://openalex.org/keywords/code-word","display_name":"Code word","score":0.5132572650909424},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.501107931137085},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.4929637908935547},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4616374671459198},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.4375714063644409},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.18156585097312927},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1572970747947693},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.15149253606796265},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10164201259613037}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.791530430316925},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.713077187538147},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5846385359764099},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5651881098747253},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.5332742929458618},{"id":"https://openalex.org/C165464430","wikidata":"https://www.wikidata.org/wiki/Q1570441","display_name":"Parameterized complexity","level":2,"score":0.528340220451355},{"id":"https://openalex.org/C153207627","wikidata":"https://www.wikidata.org/wiki/Q863873","display_name":"Code word","level":3,"score":0.5132572650909424},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.501107931137085},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.4929637908935547},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4616374671459198},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.4375714063644409},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.18156585097312927},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1572970747947693},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.15149253606796265},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10164201259613037},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dft52944.2021.9568298","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft52944.2021.9568298","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.6399999856948853,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1494767001","https://openalex.org/W1594998828","https://openalex.org/W1676666806","https://openalex.org/W1829091407","https://openalex.org/W2004340162","https://openalex.org/W2074558775","https://openalex.org/W2115252128","https://openalex.org/W2116946532","https://openalex.org/W2151142633","https://openalex.org/W2155267750","https://openalex.org/W2167418976","https://openalex.org/W2490955781","https://openalex.org/W2612081530","https://openalex.org/W2793261183","https://openalex.org/W4233882087","https://openalex.org/W6638399560","https://openalex.org/W6677618333"],"related_works":["https://openalex.org/W2051058708","https://openalex.org/W1494268238","https://openalex.org/W154868527","https://openalex.org/W1983207144","https://openalex.org/W2490706771","https://openalex.org/W2480116122","https://openalex.org/W4321442002","https://openalex.org/W4255576661","https://openalex.org/W1516574938","https://openalex.org/W2015265939"],"abstract_inverted_index":{"The":[0,164],"steadily":[1],"increasing":[2],"complexity":[3],"of":[4,106],"state-of-the-art":[5],"designs":[6],"requires":[7],"enhanced":[8],"capabilities":[9],"for":[10,182],"post-silicon":[11],"test":[12,184],"and":[13,61,89],"debug.":[14],"By":[15],"this,":[16],"the":[17,20,25,37,49,85,90,104,169,176],"demands":[18],"concerning":[19],"quality":[21],"as":[22,24,175],"well":[23],"diagnostic":[26],"capability":[27],"are":[28],"met.":[29],"Several":[30],"sophisticated":[31],"techniques":[32,46],"have":[33],"been":[34,149],"proposed":[35,170],"in":[36,58,132],"past":[38],"to":[39,55,67,83,151],"address":[40],"these":[41,45],"new":[42],"challenges.":[43],"However,":[44],"heavily":[47],"enlarge":[48],"on-chip":[50,87,107],"generated":[51,108],"data":[52,76,110],"that":[53,168],"has":[54,147],"be":[56,68,129,136],"stored":[57],"rarely":[59],"available":[60],"highly":[62,80],"expensive":[63],"memory":[64,88],"and,":[65,134],"especially,":[66],"transferred":[69],"via":[70],"a":[71,79,97,113,121],"low-speed":[72],"interface.":[73],"Thus,":[74],"applying":[75],"compression":[77,99,123,154],"is":[78,125],"beneficial":[81],"objective":[82],"reduce":[84],"dedicated":[86],"required":[91],"transfer":[92],"time.":[93],"This":[94],"work":[95],"proposes":[96],"novel":[98],"technique,":[100],"which":[101,127],"significantly":[102],"reduces":[103],"volume":[105],"debug":[109],"by":[111,155],"orchestrating":[112],"deliberately":[114],"parameterized":[115],"two-stage":[116],"neural":[117],"network.":[118],"More":[119],"precisely,":[120],"codeword-based":[122,178],"procedure":[124],"realized,":[126],"can":[128],"directly":[130],"implemented":[131],"hardware":[133,162],"hence,":[135],"seamlessly":[137],"integrated":[138],"into":[139],"an":[140],"existing":[141],"test/debug":[142],"infrastructure.":[143],"So":[144],"far,":[145],"it":[146],"not":[148],"possible":[150],"realize":[152],"such":[153],"classical":[156],"(algorithmic)":[157],"approaches":[158],"allocating":[159],"only":[160],"reasonable":[161],"resources.":[163],"experimental":[165],"evaluation":[166],"validates":[167],"scheme":[171],"achieves":[172],"similar":[173],"results":[174],"off-chip":[177],"approach":[179],"being":[180],"applied":[181],"incoming":[183],"data.":[185]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}