{"id":"https://openalex.org/W3209988830","doi":"https://doi.org/10.1109/dft52944.2021.9568294","title":"Mitigation of the impact of across chip systematic process variation using a novel system level design","display_name":"Mitigation of the impact of across chip systematic process variation using a novel system level design","publication_year":2021,"publication_date":"2021-10-06","ids":{"openalex":"https://openalex.org/W3209988830","doi":"https://doi.org/10.1109/dft52944.2021.9568294","mag":"3209988830"},"language":"en","primary_location":{"id":"doi:10.1109/dft52944.2021.9568294","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft52944.2021.9568294","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019247776","display_name":"Nabanita Ghoshal","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nabanita Ghoshal","raw_affiliation_strings":["XILINX,Hyderabad,India","XILINX, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"XILINX,Hyderabad,India","institution_ids":["https://openalex.org/I32923980"]},{"raw_affiliation_string":"XILINX, Hyderabad, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089643036","display_name":"Sree Rama KC Saraswatula","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sree Rama KC Saraswatula","raw_affiliation_strings":["XILINX,Hyderabad,India","XILINX, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"XILINX,Hyderabad,India","institution_ids":["https://openalex.org/I32923980"]},{"raw_affiliation_string":"XILINX, Hyderabad, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021987648","display_name":"Santosh Yachareni","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Santosh Yachareni","raw_affiliation_strings":["XILINX,Hyderabad,India","XILINX, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"XILINX,Hyderabad,India","institution_ids":["https://openalex.org/I32923980"]},{"raw_affiliation_string":"XILINX, Hyderabad, India","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017751774","display_name":"Shidong Zhou","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shidong Zhou","raw_affiliation_strings":["XILINX,San Jose,USA","XILINX, San Jose, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"XILINX,San Jose,USA","institution_ids":["https://openalex.org/I32923980"]},{"raw_affiliation_string":"XILINX, San Jose, USA","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074160772","display_name":"Anil Kumar Kandala","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anil Kumar Kandala","raw_affiliation_strings":["XILINX,Hyderabad,India","XILINX, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"XILINX,Hyderabad,India","institution_ids":["https://openalex.org/I32923980"]},{"raw_affiliation_string":"XILINX, Hyderabad, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011619628","display_name":"Narendra Kumar Pulipati","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Narendra Kumar Pulipati","raw_affiliation_strings":["XILINX,Hyderabad,India","XILINX, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"XILINX,Hyderabad,India","institution_ids":["https://openalex.org/I32923980"]},{"raw_affiliation_string":"XILINX, Hyderabad, India","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I32923980"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12734065,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6700972318649292},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.6684939861297607},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5852289199829102},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.48239123821258545},{"id":"https://openalex.org/keywords/process-corners","display_name":"Process corners","score":0.4808157682418823},{"id":"https://openalex.org/keywords/variation","display_name":"Variation (astronomy)","score":0.4576522409915924},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44167017936706543},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.42119699716567993},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.2254643738269806},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20540091395378113},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10557514429092407},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.08772090077400208}],"concepts":[{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6700972318649292},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.6684939861297607},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5852289199829102},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.48239123821258545},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.4808157682418823},{"id":"https://openalex.org/C2778334786","wikidata":"https://www.wikidata.org/wiki/Q1586270","display_name":"Variation (astronomy)","level":2,"score":0.4576522409915924},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44167017936706543},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.42119699716567993},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.2254643738269806},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20540091395378113},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10557514429092407},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.08772090077400208},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C44870925","wikidata":"https://www.wikidata.org/wiki/Q37547","display_name":"Astrophysics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dft52944.2021.9568294","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft52944.2021.9568294","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W306641292","https://openalex.org/W1513422997","https://openalex.org/W1552177954","https://openalex.org/W1555838017","https://openalex.org/W2015327932","https://openalex.org/W2035907685","https://openalex.org/W2042526156","https://openalex.org/W2088316180","https://openalex.org/W2096581954","https://openalex.org/W2107566947","https://openalex.org/W2114571240","https://openalex.org/W2153292994","https://openalex.org/W2161344439","https://openalex.org/W2167232152","https://openalex.org/W2785376853","https://openalex.org/W4248754745","https://openalex.org/W6672718297"],"related_works":["https://openalex.org/W2137012493","https://openalex.org/W2525077515","https://openalex.org/W2959030164","https://openalex.org/W2118152793","https://openalex.org/W1564147575","https://openalex.org/W2141625582","https://openalex.org/W4388000032","https://openalex.org/W2564437568","https://openalex.org/W2080140894","https://openalex.org/W2107916809"],"abstract_inverted_index":{"A":[0],"systematic":[1,47],"left":[2,72],"to":[3,41,62,69,84,94],"right":[4,74],"process":[5],"variation":[6,48],"is":[7,39,58,92],"observed":[8],"across":[9],"a":[10,35,67],"20":[11],"nm":[12],"technology":[13],"chip.":[14],"Consequently,":[15],"reference":[16],"generators":[17,65],"and":[18,60,73,86],"amplifiers":[19],"which":[20],"are":[21,80],"scattered":[22],"around":[23],"the":[24,44,56,63,71,88,95],"chip":[25],"undergo":[26],"severe":[27],"performance":[28,75],"fluctuations.":[29],"In":[30],"this":[31],"paper,":[32],"we":[33],"present":[34],"design":[36],"methodology":[37],"that":[38],"used":[40],"scale":[42],"down":[43],"influence":[45],"of":[46,55],"on":[49],"circuit":[50],"performance.":[51],"The":[52],"physical":[53,96],"centre":[54,97],"die":[57],"tapped":[59],"routed":[61],"voltage":[64],"as":[66],"feedback":[68,89],"minimize":[70],"deviation.":[76],"Optional":[77],"connection":[78],"cells":[79],"implemented":[81],"in":[82],"order":[83],"program":[85],"tap":[87],"path":[90],"whichever":[91],"closest":[93],"accordingly.":[98]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}