{"id":"https://openalex.org/W2982093895","doi":"https://doi.org/10.1109/dft.2019.8875372","title":"Analog Test Interface for IEEE 1687 Employing Split SAR Architecture to Support Embedded Instrument Dependability Applications","display_name":"Analog Test Interface for IEEE 1687 Employing Split SAR Architecture to Support Embedded Instrument Dependability Applications","publication_year":2019,"publication_date":"2019-10-01","ids":{"openalex":"https://openalex.org/W2982093895","doi":"https://doi.org/10.1109/dft.2019.8875372","mag":"2982093895"},"language":"en","primary_location":{"id":"doi:10.1109/dft.2019.8875372","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2019.8875372","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036815612","display_name":"Jerrin Pathrose","orcid":null},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Jerrin Pathrose","raw_affiliation_strings":["Testable Design and Test of Integrated Systems Group (TDT), University of Twente, Enschede, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Testable Design and Test of Integrated Systems Group (TDT), University of Twente, Enschede, The Netherlands","institution_ids":["https://openalex.org/I94624287"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072880635","display_name":"L. van de Logt","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Leon van de Logt","raw_affiliation_strings":["D4T Systems BV, Eindhoven, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"D4T Systems BV, Eindhoven, The Netherlands","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5063280452","display_name":"Hans G. Kerkhoff","orcid":null},"institutions":[{"id":"https://openalex.org/I94624287","display_name":"University of Twente","ror":"https://ror.org/006hf6230","country_code":"NL","type":"education","lineage":["https://openalex.org/I94624287"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Hans G. Kerkhoff","raw_affiliation_strings":["Testable Design and Test of Integrated Systems Group (TDT), University of Twente, Enschede, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Testable Design and Test of Integrated Systems Group (TDT), University of Twente, Enschede, The Netherlands","institution_ids":["https://openalex.org/I94624287"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13687009,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dependability","display_name":"Dependability","score":0.8346191644668579},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.689174473285675},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.5888819694519043},{"id":"https://openalex.org/keywords/standardization","display_name":"Standardization","score":0.560988187789917},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5575764179229736},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.55679851770401},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5538218021392822},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.47026926279067993},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34534522891044617},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33884647488594055},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1256612241268158}],"concepts":[{"id":"https://openalex.org/C77019957","wikidata":"https://www.wikidata.org/wiki/Q2689057","display_name":"Dependability","level":2,"score":0.8346191644668579},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.689174473285675},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5888819694519043},{"id":"https://openalex.org/C188087704","wikidata":"https://www.wikidata.org/wiki/Q369577","display_name":"Standardization","level":2,"score":0.560988187789917},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5575764179229736},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.55679851770401},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5538218021392822},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.47026926279067993},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34534522891044617},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33884647488594055},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1256612241268158},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/dft.2019.8875372","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2019.8875372","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"},{"id":"pmh:oai:ris.utwente.nl:openaire_cris_publications/a2e90548-4d63-4c36-b332-b5b8bff076b2","is_oa":false,"landing_page_url":"https://research.utwente.nl/en/publications/a2e90548-4d63-4c36-b332-b5b8bff076b2","pdf_url":null,"source":{"id":"https://openalex.org/S4406922991","display_name":"University of Twente Research Information","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Pathrose, J, Van De Logt, L & Kerkhoff, H G 2019, Analog test interface for IEEE 1687 employing split SAR architecture to support embedded instrument dependability applications. in 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019., 8875372, IEEE, 32nd IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2019, Noordwijk, Netherlands, 2/10/19. https://doi.org/10.1109/DFT.2019.8875372","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.6299999952316284,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320314237","display_name":"Rijksdienst voor Ondernemend Nederland","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1977030506","https://openalex.org/W2044432382","https://openalex.org/W2099432139","https://openalex.org/W2189035499","https://openalex.org/W2336539473","https://openalex.org/W2529974958","https://openalex.org/W2782049248","https://openalex.org/W2799265834","https://openalex.org/W2802818882","https://openalex.org/W4243047118"],"related_works":["https://openalex.org/W4252527915","https://openalex.org/W2409287660","https://openalex.org/W2233357156","https://openalex.org/W1976489385","https://openalex.org/W4256317220","https://openalex.org/W1506225852","https://openalex.org/W2141414364","https://openalex.org/W2376514150","https://openalex.org/W1523265213","https://openalex.org/W2363668972"],"abstract_inverted_index":{"Embedded":[0],"instruments":[1,40,48,67,95],"have":[2,131],"become":[3],"ubiquitous":[4],"in":[5,37,58],"modern":[6],"day":[7],"System-on-Chips":[8],"for":[9,41,102],"test":[10,115],"and":[11,23,76,87,117],"monitoring":[12],"purposes.":[13,43],"IEEE":[14,70,98],"1687":[15,71,99],"or":[16],"IJTAG":[17],"addresses":[18],"the":[19,69,97,108,129],"standardization":[20],"of":[21,25,35,45],"access":[22],"operation":[24],"these":[26,46,65],"embedded":[27,39,47,94],"instruments.":[28],"Recently,":[29],"there":[30],"has":[31,77],"been":[32,80,132],"a":[33,74,85],"lot":[34],"interest":[36],"employing":[38],"dependability":[42,103],"Many":[44],"are":[49,56],"required":[50],"to":[51,63,91,127],"monitor":[52],"physical":[53],"quantities":[54],"which":[55],"analog":[57,66,93,114],"nature.":[59],"A":[60],"cost-effective":[61],"architecture":[62,90,106],"integrate":[64],"into":[68],"infrastructure":[72],"is":[73],"bottleneck":[75],"not":[78],"yet":[79],"standardized.":[81],"This":[82],"paper":[83],"presents":[84],"time":[86],"area":[88],"efficient":[89],"interface":[92],"onto":[96],"network":[100],"especially":[101],"applications.":[104],"The":[105,125],"mitigates":[107],"drawbacks":[109],"associated":[110],"with":[111,121,134],"utilizing":[112],"an":[113],"bus":[116],"enables":[118],"periodic":[119],"sampling":[120],"minimal":[122],"hardware":[123],"overhead.":[124],"simulations":[126],"illustrate":[128],"concept":[130],"conducted":[133],"TSMC":[135],"40nm":[136],"CMOS":[137],"technology.":[138]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}