{"id":"https://openalex.org/W2909182267","doi":"https://doi.org/10.1109/dft.2018.8602984","title":"State Recovery for Coarse-Grain TMR Designs in FPGAs Using Partial Reconfiguration","display_name":"State Recovery for Coarse-Grain TMR Designs in FPGAs Using Partial Reconfiguration","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2909182267","doi":"https://doi.org/10.1109/dft.2018.8602984","mag":"2909182267"},"language":"en","primary_location":{"id":"doi:10.1109/dft.2018.8602984","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2018.8602984","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073377118","display_name":"Markus Sch\u00fctz","orcid":"https://orcid.org/0000-0002-3773-6009"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Markus Schutz","raw_affiliation_strings":["TU Wien, Institute of Computer Engineering, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Wien, Institute of Computer Engineering, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006749662","display_name":"Andreas Steininger","orcid":"https://orcid.org/0000-0002-3847-1647"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Andreas Steininger","raw_affiliation_strings":["TU Wien, Institute of Computer Engineering, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Wien, Institute of Computer Engineering, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083725829","display_name":"Florian Huemer","orcid":"https://orcid.org/0000-0002-2776-7768"},"institutions":[{"id":"https://openalex.org/I145847075","display_name":"TU Wien","ror":"https://ror.org/04d836q62","country_code":"AT","type":"education","lineage":["https://openalex.org/I145847075"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Florian Huemer","raw_affiliation_strings":["TU Wien, Institute of Computer Engineering, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Wien, Institute of Computer Engineering, Vienna, Austria","institution_ids":["https://openalex.org/I145847075"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077997647","display_name":"Jakob Lechner","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jakob Lechner","raw_affiliation_strings":["RUAG Space GmbH, Integrated Electronics Group, Stachegasse 16, Vienna, 1120, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"RUAG Space GmbH, Integrated Electronics Group, Stachegasse 16, Vienna, 1120, Austria","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1309,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.52330057,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"2","issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/triple-modular-redundancy","display_name":"Triple modular redundancy","score":0.875971794128418},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8136253952980042},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7883700132369995},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.6026984453201294},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5881394743919373},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5734614729881287},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.4965589642524719},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.4842519462108612},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4319077730178833},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.17454776167869568},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.110626220703125}],"concepts":[{"id":"https://openalex.org/C196371267","wikidata":"https://www.wikidata.org/wiki/Q3998979","display_name":"Triple modular redundancy","level":3,"score":0.875971794128418},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8136253952980042},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7883700132369995},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.6026984453201294},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5881394743919373},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5734614729881287},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.4965589642524719},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.4842519462108612},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4319077730178833},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.17454776167869568},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.110626220703125}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dft.2018.8602984","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2018.8602984","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/14","display_name":"Life below water","score":0.699999988079071}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1570833211","https://openalex.org/W2087347065","https://openalex.org/W2090335539","https://openalex.org/W2099569658","https://openalex.org/W2752779325","https://openalex.org/W2895239415","https://openalex.org/W3149410719","https://openalex.org/W3187317723","https://openalex.org/W4285719527"],"related_works":["https://openalex.org/W58658798","https://openalex.org/W3114375939","https://openalex.org/W3008821054","https://openalex.org/W2759696718","https://openalex.org/W2130594209","https://openalex.org/W1950809481","https://openalex.org/W2359816675","https://openalex.org/W2000379092","https://openalex.org/W2153096481","https://openalex.org/W2148616436"],"abstract_inverted_index":{"The":[0],"operation":[1,105],"of":[2,19,76,88,108,122,134],"field-programmable":[3],"gate":[4],"arrays":[5],"(FPGAs)":[6],"in":[7,33,106,116],"harsh":[8],"environments":[9],"like":[10],"space":[11],"entails":[12],"the":[13,72,86,117,124],"need":[14],"for":[15,95],"suitable":[16],"fault-tolerance":[17],"techniques":[18],"which":[20],"Triple-Modular":[21],"Redundancy":[22],"(TMR)":[23],"is":[24,30],"most":[25],"commonly":[26],"deployed.":[27],"While":[28],"TMR":[29,43,57,84,93],"undoubtedly":[31],"effective":[32],"masking":[34],"faults,":[35],"state":[36],"recovery":[37,65],"remains":[38],"a":[39,91,120,127],"problematic":[40],"issue:":[41],"Fine-grain":[42],"allows":[44],"safe":[45],"recovery,":[46],"but":[47,61],"incurs":[48],"prohibitive":[49],"area":[50],"and":[51,130],"performance":[52],"penalties.":[53],"In":[54],"contrast,":[55],"coarse-grain":[56,83],"has":[58],"little":[59],"overhead,":[60],"cannot":[62],"safely":[63],"provide":[64],"without":[66],"roll-back":[67],"or":[68],"reset.":[69],"We":[70],"use":[71],"dynamic":[73],"reconfiguration":[74],"feature":[75],"modern":[77],"FPGAs":[78],"to":[79],"augment":[80],"an":[81],"initially":[82],"with":[85],"ability":[87],"temporarily":[89],"loading":[90],"fine-grain":[92],"design":[94,129],"forward-state-recovery.":[96],"Therefore,":[97],"we":[98],"can":[99],"seamlessly":[100],"resume":[101],"correct":[102],"(fully":[103],"redundant)":[104],"case":[107],"data-as":[109],"well":[110],"as":[111],"configuration":[112],"faults":[113],"that":[114],"occurred":[115],"FPGA.":[118],"As":[119],"proof":[121],"concept,":[123],"paper":[125],"presents":[126],"showcase":[128],"discusses":[131],"distinctive":[132],"properties":[133],"this":[135],"new":[136],"approach.":[137]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}