{"id":"https://openalex.org/W2783131733","doi":"https://doi.org/10.1109/dft.2017.8244446","title":"A defective level monitor of open defects in 3D ICs with a comparator of offset cancellation type","display_name":"A defective level monitor of open defects in 3D ICs with a comparator of offset cancellation type","publication_year":2017,"publication_date":"2017-10-01","ids":{"openalex":"https://openalex.org/W2783131733","doi":"https://doi.org/10.1109/dft.2017.8244446","mag":"2783131733"},"language":"en","primary_location":{"id":"doi:10.1109/dft.2017.8244446","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2017.8244446","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045318785","display_name":"Michiya Kanda","orcid":null},"institutions":[{"id":"https://openalex.org/I922474255","display_name":"Tokushima University","ror":"https://ror.org/044vy1d05","country_code":"JP","type":"education","lineage":["https://openalex.org/I922474255"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Michiya Kanda","raw_affiliation_strings":["Industrial and Social Sciences, Tokushima University, Tokushima, Japan"],"affiliations":[{"raw_affiliation_string":"Industrial and Social Sciences, Tokushima University, Tokushima, Japan","institution_ids":["https://openalex.org/I922474255"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5052190532","display_name":"Masaki Hashizume","orcid":null},"institutions":[{"id":"https://openalex.org/I922474255","display_name":"Tokushima University","ror":"https://ror.org/044vy1d05","country_code":"JP","type":"education","lineage":["https://openalex.org/I922474255"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masaki Hashizume","raw_affiliation_strings":["Industrial and Social Sciences, Tokushima University, Tokushima, Japan"],"affiliations":[{"raw_affiliation_string":"Industrial and Social Sciences, Tokushima University, Tokushima, Japan","institution_ids":["https://openalex.org/I922474255"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071523958","display_name":"Hiroyuki Yotsuyanagi","orcid":"https://orcid.org/0000-0002-4223-3705"},"institutions":[{"id":"https://openalex.org/I922474255","display_name":"Tokushima University","ror":"https://ror.org/044vy1d05","country_code":"JP","type":"education","lineage":["https://openalex.org/I922474255"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Hiroyuki Yotsuyanagi","raw_affiliation_strings":["Industrial and Social Sciences, Tokushima University, Tokushima, Japan"],"affiliations":[{"raw_affiliation_string":"Industrial and Social Sciences, Tokushima University, Tokushima, Japan","institution_ids":["https://openalex.org/I922474255"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101941698","display_name":"Shyue-Kung Lu","orcid":"https://orcid.org/0000-0001-9232-2012"},"institutions":[{"id":"https://openalex.org/I154864474","display_name":"National Taiwan University of Science and Technology","ror":"https://ror.org/00q09pe49","country_code":"TW","type":"education","lineage":["https://openalex.org/I154864474"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shyue-Kung Lu","raw_affiliation_strings":["College of Electrical Engineering and Computer Science, National Taiwan Univ. of Science and Technology, Taipei, Taiwan(R.O.C.)"],"affiliations":[{"raw_affiliation_string":"College of Electrical Engineering and Computer Science, National Taiwan Univ. of Science and Technology, Taipei, Taiwan(R.O.C.)","institution_ids":["https://openalex.org/I154864474"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5045318785"],"corresponding_institution_ids":["https://openalex.org/I922474255"],"apc_list":null,"apc_paid":null,"fwci":0.2907,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.6219485,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/resistive-touchscreen","display_name":"Resistive touchscreen","score":0.7895232439041138},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.7877362370491028},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.7666512727737427},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5767040252685547},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4394727051258087},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4361468255519867},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.43458807468414307},{"id":"https://openalex.org/keywords/input-offset-voltage","display_name":"Input offset voltage","score":0.4273136258125305},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41688960790634155},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.35086676478385925},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31000858545303345},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.20628157258033752},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.08712401986122131}],"concepts":[{"id":"https://openalex.org/C6899612","wikidata":"https://www.wikidata.org/wiki/Q852911","display_name":"Resistive touchscreen","level":2,"score":0.7895232439041138},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.7877362370491028},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.7666512727737427},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5767040252685547},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4394727051258087},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4361468255519867},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.43458807468414307},{"id":"https://openalex.org/C63651839","wikidata":"https://www.wikidata.org/wiki/Q478566","display_name":"Input offset voltage","level":5,"score":0.4273136258125305},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41688960790634155},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.35086676478385925},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31000858545303345},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.20628157258033752},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.08712401986122131},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dft.2017.8244446","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dft.2017.8244446","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322832","display_name":"University of Tokyo","ror":"https://ror.org/057zh3y96"},{"id":"https://openalex.org/F4320334764","display_name":"Japan Society for the Promotion of Science","ror":"https://ror.org/00hhkn466"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1552383985","https://openalex.org/W1963959031","https://openalex.org/W1971336327","https://openalex.org/W2055841712","https://openalex.org/W2061141647","https://openalex.org/W2068262032","https://openalex.org/W2091911110","https://openalex.org/W2095790208","https://openalex.org/W2130877430","https://openalex.org/W2132155220","https://openalex.org/W2481508967","https://openalex.org/W2570203339"],"related_works":["https://openalex.org/W2136440001","https://openalex.org/W2107423283","https://openalex.org/W3093575925","https://openalex.org/W2122001378","https://openalex.org/W1965493748","https://openalex.org/W1951127657","https://openalex.org/W1901843583","https://openalex.org/W2797920886","https://openalex.org/W2791607411","https://openalex.org/W2135250276"],"abstract_inverted_index":{"Resistive":[0],"open":[1,10,39,58,120],"defects":[2,40],"in":[3,49,79,107],"3D":[4,47],"ICs":[5,48],"may":[6],"change":[7],"into":[8],"hard":[9],"ones":[11],"that":[12,113],"cause":[13],"logical":[14],"errors":[15],"after":[16],"shipping":[17],"to":[18,32],"a":[19,24,50,56,91,118],"market.":[20,51],"In":[21],"this":[22,108],"paper,":[23],"built-in":[25],"defective":[26],"level":[27,54],"monitoring":[28,83,101],"circuit":[29,75,84],"is":[30,60,102,111],"proposed":[31],"monitor":[33],"the":[34,80,99,114,126],"changing":[35,115],"process":[36,100,116],"of":[37,46,55,64,86,93,98,117,128],"resistive":[38,57,119],"occurring":[41],"at":[42,125],"interconnects":[43],"among":[44],"dies":[45,78],"The":[52,82],"defect":[53,59,121],"monitored":[61,124],"by":[62,104],"means":[63],"quiescent":[65],"supply":[66],"current":[67],"made":[68],"flow":[69],"with":[70],"an":[71,87],"IEEE":[72],"1149.1":[73],"test":[74],"embedded":[76],"inside":[77],"ICs.":[81],"consists":[85],"I-V":[88],"converter":[89],"and":[90],"comparator":[92],"offset":[94],"cancellation":[95],"type.":[96],"Feasibility":[97],"examined":[103],"SPICE":[105],"simulation":[106],"paper.":[109],"It":[110],"shown":[112],"can":[122],"be":[123],"sensitivity":[127],"5\u03a9.":[129]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-03-05T09:29:38.588285","created_date":"2025-10-10T00:00:00"}