{"id":"https://openalex.org/W2765365852","doi":"https://doi.org/10.1109/desec.2017.8073851","title":"Radix-4 adder design with refined carry","display_name":"Radix-4 adder design with refined carry","publication_year":2017,"publication_date":"2017-08-01","ids":{"openalex":"https://openalex.org/W2765365852","doi":"https://doi.org/10.1109/desec.2017.8073851","mag":"2765365852"},"language":"en","primary_location":{"id":"doi:10.1109/desec.2017.8073851","is_oa":false,"landing_page_url":"https://doi.org/10.1109/desec.2017.8073851","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE Conference on Dependable and Secure Computing","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103846171","display_name":"Chun\u2010Hsiang Lai","orcid":null},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chun-Hsiang Lai","raw_affiliation_strings":["Department of Computer Science and Engineering, National Chung Hsing University, Taichung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, National Chung Hsing University, Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027839959","display_name":"Yu\u2010Cheng Cheng","orcid":"https://orcid.org/0000-0003-0012-863X"},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Cheng Cheng","raw_affiliation_strings":["Department of Computer Science and Engineering, National Chung Hsing University, Taichung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, National Chung Hsing University, Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020604466","display_name":"Tung-Chi Wu","orcid":null},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tung-Chi Wu","raw_affiliation_strings":["Department of Computer Science and Engineering, National Chung Hsing University, Taichung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, National Chung Hsing University, Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5041601680","display_name":"Yen\u2010Jen Chang","orcid":"https://orcid.org/0000-0002-0314-6625"},"institutions":[{"id":"https://openalex.org/I162838928","display_name":"National Chung Hsing University","ror":"https://ror.org/05vn3ca78","country_code":"TW","type":"education","lineage":["https://openalex.org/I162838928"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yen-Jen Chang","raw_affiliation_strings":["Department of Computer Science and Engineering, National Chung Hsing University, Taichung, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, National Chung Hsing University, Taichung, Taiwan","institution_ids":["https://openalex.org/I162838928"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I162838928"],"apc_list":null,"apc_paid":null,"fwci":0.3792,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.50242433,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.964640200138092},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.837666928768158},{"id":"https://openalex.org/keywords/serial-binary-adder","display_name":"Serial binary adder","score":0.7690011262893677},{"id":"https://openalex.org/keywords/carry-save-adder","display_name":"Carry-save adder","score":0.7568438649177551},{"id":"https://openalex.org/keywords/carry","display_name":"Carry (investment)","score":0.6955274939537048},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6856817007064819},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5534277558326721},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.5019001960754395},{"id":"https://openalex.org/keywords/radix","display_name":"Radix (gastropod)","score":0.46542805433273315},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.46274334192276},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.44753575325012207},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4448893070220947},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4114265441894531},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3364717662334442},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.2510506510734558},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.18212628364562988},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.17432597279548645},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15960833430290222},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11787205934524536}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.964640200138092},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.837666928768158},{"id":"https://openalex.org/C116206932","wikidata":"https://www.wikidata.org/wiki/Q7454686","display_name":"Serial binary adder","level":4,"score":0.7690011262893677},{"id":"https://openalex.org/C3227080","wikidata":"https://www.wikidata.org/wiki/Q5046770","display_name":"Carry-save adder","level":4,"score":0.7568438649177551},{"id":"https://openalex.org/C2776299755","wikidata":"https://www.wikidata.org/wiki/Q432449","display_name":"Carry (investment)","level":2,"score":0.6955274939537048},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6856817007064819},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5534277558326721},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.5019001960754395},{"id":"https://openalex.org/C2779091547","wikidata":"https://www.wikidata.org/wiki/Q287565","display_name":"Radix (gastropod)","level":2,"score":0.46542805433273315},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.46274334192276},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.44753575325012207},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4448893070220947},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4114265441894531},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3364717662334442},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.2510506510734558},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.18212628364562988},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.17432597279548645},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15960833430290222},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11787205934524536},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C59822182","wikidata":"https://www.wikidata.org/wiki/Q441","display_name":"Botany","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/desec.2017.8073851","is_oa":false,"landing_page_url":"https://doi.org/10.1109/desec.2017.8073851","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE Conference on Dependable and Secure Computing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1540658227","https://openalex.org/W1971467632","https://openalex.org/W2098769011","https://openalex.org/W2125235887","https://openalex.org/W2131107384"],"related_works":["https://openalex.org/W2364181090","https://openalex.org/W4299002946","https://openalex.org/W2950518102","https://openalex.org/W2953746839","https://openalex.org/W2516396101","https://openalex.org/W2374852146","https://openalex.org/W2370097872","https://openalex.org/W2064215635","https://openalex.org/W4295540194","https://openalex.org/W2112595260"],"abstract_inverted_index":{"Adder":[0],"is":[1,19,73],"a":[2,28],"critical":[3],"component":[4],"in":[5],"arithmetic":[6],"and":[7,15,104,114,123],"logic":[8],"units":[9],"(ALUs).":[10],"Minimizing":[11],"the":[12,39,46,56,64,89,100],"power":[13],"consumption":[14],"delay":[16],"of":[17,59,70],"adder":[18,33,49,103],"an":[20],"important":[21],"issue.":[22],"In":[23],"this":[24],"paper,":[25],"we":[26],"proposed":[27,47,83],"high":[29,44],"performance":[30],"multiplexer-based":[31],"radix-4":[32,48,102],"with":[34,99],"refined":[35],"carry":[36,57,66,106],"to":[37,62],"reduce":[38,112],"propagation":[40],"delay.":[41],"To":[42],"achieve":[43],"performance,":[45],"adopts":[50],"multiplexers":[51],"which":[52],"are":[53,78],"controlled":[54],"by":[55,87],"signal":[58],"previous":[60,101],"stage":[61],"avoid":[63],"long":[65],"chain.":[67],"The":[68,82],"drivability":[69],"all":[71,76],"outputs":[72,77],"strong":[74],"because":[75],"full":[79],"voltage":[80],"swing.":[81],"design":[84,110,119],"was":[85],"simulated":[86],"using":[88],"TSMC":[90],"CMOS":[91],"45":[92],"nm":[93],"technology.":[94],"For":[95],"32-bit":[96],"adders,":[97],"compared":[98],"2-bit":[105],"select":[107],"adder,":[108],"our":[109,118],"can":[111],"16%":[113],"19%":[115],"delay,":[116],"respectively;":[117],"also":[120],"achieves":[121],"13%":[122],"66%":[124],"EDP":[125],"reduction,":[126],"respectively.":[127]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}