{"id":"https://openalex.org/W7161707175","doi":"https://doi.org/10.1109/ddecs69233.2026.11521006","title":"Embedded Tutorial Considerations on the Design of Resilient System-in-Package Based on On-Chip Lifecycle Management","display_name":"Embedded Tutorial Considerations on the Design of Resilient System-in-Package Based on On-Chip Lifecycle Management","publication_year":2026,"publication_date":"2026-04-27","ids":{"openalex":"https://openalex.org/W7161707175","doi":"https://doi.org/10.1109/ddecs69233.2026.11521006"},"language":null,"primary_location":{"id":"doi:10.1109/ddecs69233.2026.11521006","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs69233.2026.11521006","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE 29th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5123304614","display_name":"Fabian Vargas","orcid":null},"institutions":[{"id":"https://openalex.org/I92894754","display_name":"Leibniz Institute for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Fabian Vargas","raw_affiliation_strings":["IHP - Leibniz Institute for High, Performance Microelectronics,Frankfurt Oder,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IHP - Leibniz Institute for High, Performance Microelectronics,Frankfurt Oder,Germany","institution_ids":["https://openalex.org/I92894754"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5136474877","display_name":"Marko Andjelkovic","orcid":null},"institutions":[{"id":"https://openalex.org/I92894754","display_name":"Leibniz Institute for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Marko Andjelkovic","raw_affiliation_strings":["IHP - Leibniz Institute for High, Performance Microelectronics,Frankfurt Oder,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IHP - Leibniz Institute for High, Performance Microelectronics,Frankfurt Oder,Germany","institution_ids":["https://openalex.org/I92894754"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5135670721","display_name":"Christos Sotiriou","orcid":null},"institutions":[{"id":"https://openalex.org/I145722265","display_name":"University of Thessaly","ror":"https://ror.org/04v4g9h31","country_code":"GR","type":"education","lineage":["https://openalex.org/I145722265"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Christos Sotiriou","raw_affiliation_strings":["University of Thessaly,Volos,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Thessaly,Volos,Greece","institution_ids":["https://openalex.org/I145722265"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.4169999957084656,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.4169999957084656,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.09430000185966492,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.053300000727176666,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/system-lifecycle","display_name":"System lifecycle","score":0.5246000289916992},{"id":"https://openalex.org/keywords/application-lifecycle-management","display_name":"Application lifecycle management","score":0.45910000801086426},{"id":"https://openalex.org/keywords/product-life-cycle-management","display_name":"Product life-cycle management","score":0.3463999927043915},{"id":"https://openalex.org/keywords/product-lifecycle","display_name":"Product lifecycle","score":0.3409000039100647},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.31630000472068787},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.29789999127388}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5476999878883362},{"id":"https://openalex.org/C35280785","wikidata":"https://www.wikidata.org/wiki/Q559486","display_name":"System lifecycle","level":4,"score":0.5246000289916992},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.4966999888420105},{"id":"https://openalex.org/C30452754","wikidata":"https://www.wikidata.org/wiki/Q621590","display_name":"Application lifecycle management","level":3,"score":0.45910000801086426},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3603000044822693},{"id":"https://openalex.org/C7465953","wikidata":"https://www.wikidata.org/wiki/Q1572577","display_name":"Product life-cycle management","level":2,"score":0.3463999927043915},{"id":"https://openalex.org/C194304873","wikidata":"https://www.wikidata.org/wiki/Q1967338","display_name":"Product lifecycle","level":3,"score":0.3409000039100647},{"id":"https://openalex.org/C195094911","wikidata":"https://www.wikidata.org/wiki/Q14167904","display_name":"Process management","level":1,"score":0.32749998569488525},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.31630000472068787},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3082999885082245},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.29789999127388},{"id":"https://openalex.org/C18762648","wikidata":"https://www.wikidata.org/wiki/Q42213","display_name":"Work (physics)","level":2,"score":0.2957000136375427},{"id":"https://openalex.org/C112930515","wikidata":"https://www.wikidata.org/wiki/Q4389547","display_name":"Risk analysis (engineering)","level":1,"score":0.2736000120639801},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.265500009059906},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.25780001282691956},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.251800000667572},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.2502000033855438}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs69233.2026.11521006","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs69233.2026.11521006","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2026 IEEE 29th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1062671409","https://openalex.org/W2027252492","https://openalex.org/W2044547009","https://openalex.org/W2094981849","https://openalex.org/W2129999022","https://openalex.org/W2152765727","https://openalex.org/W2170058139","https://openalex.org/W2942761161","https://openalex.org/W3157485505","https://openalex.org/W4313417901","https://openalex.org/W4384009469","https://openalex.org/W4386210996","https://openalex.org/W4391426130","https://openalex.org/W4401329667","https://openalex.org/W4405936334","https://openalex.org/W4409561190","https://openalex.org/W4409985160","https://openalex.org/W4411196112","https://openalex.org/W4415744072","https://openalex.org/W4416582810"],"related_works":[],"abstract_inverted_index":{"This":[0],"tutorial":[1],"addresses":[2],"the":[3,24,39,57,61],"benefits":[4,20],"one":[5],"can":[6,79,123,135,148],"take":[7],"from":[8,60,81],"deploying":[9],"on-chip":[10,28,74,187],"lifecycle":[11,188],"management":[12,48,189],"(OCLM)":[13],"to":[14,53,66,99,138,185,190],"design":[15],"resilient":[16],"Systems-in-Package":[17],"(SiP).":[18],"Such":[19],"are":[21,33],"based":[22,151,167],"on":[23,126,128,152,168],"massive":[25],"deployment":[26],"of":[27,38,71],"cross-layer,":[29],"collaborative":[30],"sensors":[31,62,78,122],"that":[32,50],"placed":[34,125],"in":[35,63,95,102,119],"strategic":[36],"points":[37],"chiplets":[40],"and":[41,55,73,92,107,114,116,132,142,161,197],"interposer,":[42],"a":[43,64],"data":[44,59,115,140,154],"wrapper":[45],"interface":[46],"&":[47],"hub":[49],"is":[51,184],"responsible":[52],"process":[54],"store":[56],"collected":[58],"way":[65],"create":[67],"an":[68],"in-mission":[69,192],"history":[70],"events,":[72],"analytics":[75,146],"engine.":[76],"The":[77,121,145,181],"monitor":[80],"siliconlevel":[82],"information":[83],"(such":[84],"as":[85,157,176],"transistor":[86],"aging,":[87],"power-supply":[88],"noise":[89],"activity,":[90],"electromigration,":[91],"transient":[93],"faults":[94],"memory":[96,108],"elements)":[97],"up":[98],"system-level":[100],"transactions":[101],"system":[103],"bus,":[104],"processor":[105],"cores":[106],"IPs":[109],"(e.g.":[110],"task":[111],"scheduling":[112],"algorithm,":[113],"instructions":[117],"fetched":[118],"memory).":[120],"be":[124,136,149,166],"dies":[127],"interposer.":[129],"Furthermore,":[130],"IEEE":[131],"IEC":[133],"standards":[134],"used":[137],"support":[139],"monitoring":[141],"collection":[143],"processes.":[144],"engine":[147],"implemented":[150],"simple/straightforward":[153],"structures":[155],"such":[156,175],"Look-up":[158],"Table":[159],"(LUT)":[160],"Content-Addressable":[162],"Memory":[163],"(CAM),":[164],"or":[165],"advanced":[169],"Machine":[170],"Learning/Artificial":[171],"Intelligence":[172],"(ML/AI)":[173],"algorithms":[174],"Dynamic":[177],"Neural":[178],"Network":[179],"(DNN).":[180],"ultimate":[182],"goal":[183],"perform":[186],"trade,":[191],"mode,":[193],"power,":[194],"performance,":[195],"reliability":[196],"lifespan.":[198]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2026-05-20T00:00:00"}