{"id":"https://openalex.org/W4379115515","doi":"https://doi.org/10.1109/ddecs57882.2023.10139343","title":"Characterization of Interconnect Fault Effects in SRAM-based FPGAs","display_name":"Characterization of Interconnect Fault Effects in SRAM-based FPGAs","publication_year":2023,"publication_date":"2023-05-03","ids":{"openalex":"https://openalex.org/W4379115515","doi":"https://doi.org/10.1109/ddecs57882.2023.10139343"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs57882.2023.10139343","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs57882.2023.10139343","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028238740","display_name":"Christian Fibich","orcid":"https://orcid.org/0000-0001-8499-1507"},"institutions":[{"id":"https://openalex.org/I121760703","display_name":"University of Applied Sciences Technikum Wien","ror":"https://ror.org/04jsx0x49","country_code":"AT","type":"education","lineage":["https://openalex.org/I121760703"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Christian Fibich","raw_affiliation_strings":["UAS Technikum Wien,Dept. of Electronic Engineering,Vienna,Austria","Dept. of Electronic Engineering, UAS Technikum Wien, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UAS Technikum Wien,Dept. of Electronic Engineering,Vienna,Austria","institution_ids":["https://openalex.org/I121760703"]},{"raw_affiliation_string":"Dept. of Electronic Engineering, UAS Technikum Wien, Vienna, Austria","institution_ids":["https://openalex.org/I121760703"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028034207","display_name":"Martin Horauer","orcid":"https://orcid.org/0000-0001-6835-0662"},"institutions":[{"id":"https://openalex.org/I121760703","display_name":"University of Applied Sciences Technikum Wien","ror":"https://ror.org/04jsx0x49","country_code":"AT","type":"education","lineage":["https://openalex.org/I121760703"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Martin Horauer","raw_affiliation_strings":["UAS Technikum Wien,Dept. of Electronic Engineering,Vienna,Austria","Dept. of Electronic Engineering, UAS Technikum Wien, Vienna, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"UAS Technikum Wien,Dept. of Electronic Engineering,Vienna,Austria","institution_ids":["https://openalex.org/I121760703"]},{"raw_affiliation_string":"Dept. of Electronic Engineering, UAS Technikum Wien, Vienna, Austria","institution_ids":["https://openalex.org/I121760703"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007015294","display_name":"Roman Obermaisser","orcid":"https://orcid.org/0009-0002-4483-1503"},"institutions":[{"id":"https://openalex.org/I206895457","display_name":"University of Siegen","ror":"https://ror.org/02azyry73","country_code":"DE","type":"education","lineage":["https://openalex.org/I206895457"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Roman Obermaisser","raw_affiliation_strings":["University of Siegen,Chair for Embedded Systems,Siegen,Germany","Chair for Embedded Systems, University of Siegen, Siegen, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Siegen,Chair for Embedded Systems,Siegen,Germany","institution_ids":["https://openalex.org/I206895457"]},{"raw_affiliation_string":"Chair for Embedded Systems, University of Siegen, Siegen, Germany","institution_ids":["https://openalex.org/I206895457"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8259909152984619},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7948347330093384},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7226464748382568},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6121713519096375},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5930539965629578},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.5882180333137512},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5491724610328674},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5139555335044861},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.45373669266700745},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.21750858426094055},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.1222730278968811},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.059838443994522095}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8259909152984619},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7948347330093384},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7226464748382568},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6121713519096375},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5930539965629578},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.5882180333137512},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5491724610328674},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5139555335044861},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.45373669266700745},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.21750858426094055},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.1222730278968811},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.059838443994522095},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs57882.2023.10139343","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs57882.2023.10139343","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W165265432","https://openalex.org/W2011402892","https://openalex.org/W2891034350","https://openalex.org/W2912412330","https://openalex.org/W2913560214","https://openalex.org/W3000526562","https://openalex.org/W3116472861","https://openalex.org/W3186013935","https://openalex.org/W6787629271"],"related_works":["https://openalex.org/W2378211422","https://openalex.org/W3151633427","https://openalex.org/W4321353415","https://openalex.org/W2012045996","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3006277082","https://openalex.org/W2610634993","https://openalex.org/W2097660413","https://openalex.org/W2081738003"],"abstract_inverted_index":{"The":[0],"configurable":[1],"interconnect":[2,51,67,119,129],"of":[3,11,27,30,36,69,89,118,128],"SRAM-based":[4],"FPGAs":[5],"makes":[6],"up":[7],"a":[8,17,70,96,153],"significant":[9],"portion":[10],"their":[12],"configuration,":[13],"and":[14,44,83,114],"thus":[15],"exposes":[16],"large":[18],"attack":[19],"surface":[20],"to":[21,48,63,74,85,147,173],"single-event":[22],"upsets.":[23],"A":[24],"better":[25],"understanding":[26],"the":[28,34,66,76,87,176],"behavior":[29],"FPGA":[31,72,98,109],"interconnects":[32],"under":[33],"presence":[35],"these":[37,122],"faults":[38,52,91,120],"may":[39],"allow":[40],"fault":[41,130,141,160],"injection":[42,142,161],"campaigns":[43],"reliability":[45],"estimation":[46],"techniques":[47],"treat":[49],"some":[50],"as":[53],"more":[54,134,139],"serious":[55],"than":[56,136],"others.":[57],"This":[58],"work":[59],"proposes":[60],"an":[61],"approach":[62],"(1)":[64],"analyze":[65],"configuration":[68],"given":[71,97],"technology":[73],"deduce":[75],"logical":[77],"effects":[78,88],"caused":[79],"by":[80,167],"single-bit":[81],"flips":[82],"(2)":[84],"characterize":[86],"such":[90],"on":[92,95,107,121,152],"routes":[93],"implemented":[94,151],"technology.":[99],"These":[100],"approaches":[101],"are":[102,132,171],"illustrated":[103],"in":[104],"case":[105],"studies":[106],"two":[108],"technologies:":[110],"Xilinx":[111,154],"7":[112,155],"Series":[113,156],"Lattice":[115],"iCE40.":[116],"Characterization":[117],"devices":[123],"revealed":[124],"that":[125,159,170],"certain":[126],"subcategories":[127],"types":[131],"far":[133],"critical":[135],"others,":[137],"allowing":[138],"focused":[140],"campaigns.":[143],"Applying":[144],"this":[145],"knowledge":[146],"three":[148],"benchmark":[149],"designs":[150],"device":[157],"shows":[158],"effort":[162],"can":[163],"be":[164],"significantly":[165],"reduced":[166],"skipping":[168],"bits":[169],"unlikely":[172],"critically":[174],"impact":[175],"design.":[177]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
