{"id":"https://openalex.org/W3161296546","doi":"https://doi.org/10.1109/ddecs52668.2021.9417027","title":"Approximate Multipliers for Optimal Utilization of FPGA Resources","display_name":"Approximate Multipliers for Optimal Utilization of FPGA Resources","publication_year":2021,"publication_date":"2021-04-07","ids":{"openalex":"https://openalex.org/W3161296546","doi":"https://doi.org/10.1109/ddecs52668.2021.9417027","mag":"3161296546"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs52668.2021.9417027","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs52668.2021.9417027","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019154355","display_name":"Christoph Niemann","orcid":"https://orcid.org/0000-0001-9371-1087"},"institutions":[{"id":"https://openalex.org/I4665924","display_name":"University of Rostock","ror":"https://ror.org/03zdwsf69","country_code":"DE","type":"education","lineage":["https://openalex.org/I4665924"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Christoph Niemann","raw_affiliation_strings":["Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","institution_ids":["https://openalex.org/I4665924"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019784145","display_name":"Michael Rethfeldt","orcid":"https://orcid.org/0000-0003-3685-0616"},"institutions":[{"id":"https://openalex.org/I4665924","display_name":"University of Rostock","ror":"https://ror.org/03zdwsf69","country_code":"DE","type":"education","lineage":["https://openalex.org/I4665924"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Michael Rethfeldt","raw_affiliation_strings":["Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","institution_ids":["https://openalex.org/I4665924"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103173327","display_name":"Dirk Timmermann","orcid":"https://orcid.org/0000-0001-9267-9695"},"institutions":[{"id":"https://openalex.org/I4665924","display_name":"University of Rostock","ror":"https://ror.org/03zdwsf69","country_code":"DE","type":"education","lineage":["https://openalex.org/I4665924"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Dirk Timmermann","raw_affiliation_strings":["Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","institution_ids":["https://openalex.org/I4665924"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5019154355"],"corresponding_institution_ids":["https://openalex.org/I4665924"],"apc_list":null,"apc_paid":null,"fwci":0.3008,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.54899326,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"23","last_page":"28"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.8869072198867798},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8254945278167725},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7684694528579712},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.725205659866333},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.5557093024253845},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.48461613059043884},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.4397379457950592},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.4325471818447113},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43103915452957153},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.38818830251693726},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.35918503999710083},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.294123113155365},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1425343155860901}],"concepts":[{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.8869072198867798},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8254945278167725},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7684694528579712},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.725205659866333},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.5557093024253845},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.48461613059043884},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.4397379457950592},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.4325471818447113},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43103915452957153},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.38818830251693726},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.35918503999710083},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.294123113155365},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1425343155860901},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs52668.2021.9417027","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs52668.2021.9417027","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8399999737739563,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1929609097","https://openalex.org/W2548638895","https://openalex.org/W2752317749","https://openalex.org/W2760220936","https://openalex.org/W2770978880","https://openalex.org/W2799036754","https://openalex.org/W2799283557","https://openalex.org/W3013744920","https://openalex.org/W3018203643","https://openalex.org/W3021968382","https://openalex.org/W3092362650","https://openalex.org/W4246795461","https://openalex.org/W4255177036","https://openalex.org/W6729437904","https://openalex.org/W6750575099","https://openalex.org/W6752737636"],"related_works":["https://openalex.org/W2990962948","https://openalex.org/W2165367082","https://openalex.org/W1972641423","https://openalex.org/W611446063","https://openalex.org/W2084169748","https://openalex.org/W2127529229","https://openalex.org/W2121819644","https://openalex.org/W4226372077","https://openalex.org/W4239625882","https://openalex.org/W4312425599"],"abstract_inverted_index":{"Approximate":[0],"or":[1,43],"inexact":[2],"arithmetic":[3,50,71],"is":[4,25,118,137,194],"a":[5,17,59,119,169],"promising":[6],"approach":[7,131],"towards":[8,83,132,140],"lower":[9],"power":[10],"consumption":[11],"for":[12,89,112,126,148],"applications":[13,39,113],"that":[14,136],"can":[15,46],"tolerate":[16],"certain":[18,60],"amount":[19,61],"of":[20,62,65,70,105,122,144,164,175],"imprecision.":[21],"As":[22,107],"human":[23],"perception":[24],"limited":[26],"in":[27,97,110,173],"its":[28],"precision,":[29],"this":[30],"applies":[31],"to":[32,58,184],"image":[33],"and":[34,76,197],"audio":[35],"processing.":[36],"Beyond,":[37],"other":[38],"like":[40,114],"neuronal":[41],"networks":[42],"AI":[44],"processing":[45,135],"benefit":[47],"from":[48],"such":[49,92],"as":[51,53],"well,":[52],"they":[54],"are":[55,78,86,95],"inherently":[56],"tolerant":[57],"inaccuracy.":[63],"One":[64],"the":[66,100,141,154,179,185],"most":[67],"critical":[68],"components":[69],"circuits":[72],"regarding":[73],"power,":[74],"delay,":[75],"area":[77,171],"multipliers.":[79],"Various":[80],"sophisticated":[81],"approaches":[82,94],"approximate":[84,123,133],"multipliers":[85],"already":[87],"published":[88],"ASICs.":[90],"However,":[91],"ASIC":[93],"under-performing":[96],"conjunction":[98],"with":[99],"specific":[101],"Lookup-Table":[102],"(LUT)-based":[103],"design":[104,124,193],"FPGAs.":[106,127,145],"FPGAs":[108],"gain":[109],"importance":[111],"signal":[115,134],"processing,":[116],"there":[117],"substantial":[120],"lack":[121],"methodology":[125],"We":[128],"propose":[129],"an":[130,159],"specifically":[138],"tailored":[139],"LUT-based":[142],"hardware":[143],"It":[146],"allows":[147],"significant":[149],"performance":[150],"improvements":[151],"while":[152,177],"lowering":[153],"energy":[155],"demands.":[156],"While":[157],"introducing":[158],"insignificant":[160],"average":[161],"relative":[162],"error":[163],"just":[165],"0.14%,":[166],"we":[167],"achieve":[168],"45.9%":[170],"reduction":[172],"terms":[174],"LUTs":[176],"decreasing":[178],"delay":[180],"by":[181],"30.6%":[182],"compared":[183],"Xilinx":[186],"Vivado":[187],"multiplier":[188],"IP":[189],"core.":[190],"Our":[191],"proposed":[192],"open":[195],"source":[196],"available":[198],"at":[199],"https://github.com/niemann-c/approx-mult-for-fpga.":[200]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}