{"id":"https://openalex.org/W2947318531","doi":"https://doi.org/10.1109/ddecs.2019.8724669","title":"From Constraints to Tape-Out: Towards a Continuous AMS Design Flow","display_name":"From Constraints to Tape-Out: Towards a Continuous AMS Design Flow","publication_year":2019,"publication_date":"2019-04-01","ids":{"openalex":"https://openalex.org/W2947318531","doi":"https://doi.org/10.1109/ddecs.2019.8724669","mag":"2947318531"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2019.8724669","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2019.8724669","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://publica.fraunhofer.de/documents/N-543679.html","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030840336","display_name":"Andreas Krinke","orcid":"https://orcid.org/0000-0001-7081-4104"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Andreas Krinke","raw_affiliation_strings":["Technische Universit\u00e4t Dresden, Institute of Electromechanical and Electronic Design, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t Dresden, Institute of Electromechanical and Electronic Design, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022742314","display_name":"Tilman Horst","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Tilman Horst","raw_affiliation_strings":["Technische Universit\u00e4t Dresden, Institute of Electromechanical and Electronic Design, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t Dresden, Institute of Electromechanical and Electronic Design, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102897374","display_name":"Georg Gl\u00e4ser","orcid":"https://orcid.org/0000-0002-7923-0284"},"institutions":[{"id":"https://openalex.org/I4210145956","display_name":"Institut f\u00fcr Mikroelektronik- und Mechatronik-Systeme","ror":"https://ror.org/0445d9h15","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210145956"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Georg Glaser","raw_affiliation_strings":["IMMS Institut f\u00fcr Mikroelektronik- und Mechatronik-Systeme gemeinn\u00fctzige GmbH Ilmenau, Germany"],"affiliations":[{"raw_affiliation_string":"IMMS Institut f\u00fcr Mikroelektronik- und Mechatronik-Systeme gemeinn\u00fctzige GmbH Ilmenau, Germany","institution_ids":["https://openalex.org/I4210145956"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014981669","display_name":"Martin Grabmann","orcid":"https://orcid.org/0000-0002-1839-8745"},"institutions":[{"id":"https://openalex.org/I4210145956","display_name":"Institut f\u00fcr Mikroelektronik- und Mechatronik-Systeme","ror":"https://ror.org/0445d9h15","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210145956"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Martin Grabmann","raw_affiliation_strings":["IMMS Institut f\u00fcr Mikroelektronik- und Mechatronik-Systeme gemeinn\u00fctzige GmbH Ilmenau, Germany"],"affiliations":[{"raw_affiliation_string":"IMMS Institut f\u00fcr Mikroelektronik- und Mechatronik-Systeme gemeinn\u00fctzige GmbH Ilmenau, Germany","institution_ids":["https://openalex.org/I4210145956"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5005436334","display_name":"Tobias Markus","orcid":null},"institutions":[{"id":"https://openalex.org/I223822909","display_name":"Heidelberg University","ror":"https://ror.org/038t36y30","country_code":"DE","type":"education","lineage":["https://openalex.org/I223822909"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Tobias Markus","raw_affiliation_strings":["Heidelberg University, ZITI, Computer Architecture Group, Heidelberg, Germany"],"affiliations":[{"raw_affiliation_string":"Heidelberg University, ZITI, Computer Architecture Group, Heidelberg, Germany","institution_ids":["https://openalex.org/I223822909"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026535134","display_name":"Benjamin Prautsch","orcid":"https://orcid.org/0000-0002-1051-6209"},"institutions":[{"id":"https://openalex.org/I4210095661","display_name":"Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS","ror":"https://ror.org/00s5yp124","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210095661","https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Benjamin Prautsch","raw_affiliation_strings":["Division Engineering of Adaptive Systems, Fraunhofer IIS/EAS, Institute for Integrated Circuits, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Division Engineering of Adaptive Systems, Fraunhofer IIS/EAS, Institute for Integrated Circuits, Dresden, Germany","institution_ids":["https://openalex.org/I4210095661"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033594126","display_name":"Uwe Hatnik","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095661","display_name":"Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS","ror":"https://ror.org/00s5yp124","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210095661","https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Uwe Hatnik","raw_affiliation_strings":["Division Engineering of Adaptive Systems, Fraunhofer IIS/EAS, Institute for Integrated Circuits, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Division Engineering of Adaptive Systems, Fraunhofer IIS/EAS, Institute for Integrated Circuits, Dresden, Germany","institution_ids":["https://openalex.org/I4210095661"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070654831","display_name":"Jens Lienig","orcid":"https://orcid.org/0000-0002-2140-4587"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jens Lienig","raw_affiliation_strings":["Technische Universit\u00e4t Dresden, Institute of Electromechanical and Electronic Design, Dresden, Germany"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t Dresden, Institute of Electromechanical and Electronic Design, Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5030840336"],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":0.1206,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.44870571,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"10"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/schematic","display_name":"Schematic","score":0.8222675919532776},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.7364920377731323},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.7087323665618896},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6926868557929993},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5090531706809998},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4938862919807434},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.47336336970329285},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.441113144159317},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.43231356143951416},{"id":"https://openalex.org/keywords/flow","display_name":"Flow (mathematics)","score":0.4310457110404968},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.41434773802757263},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.39495551586151123},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.31791558861732483},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.26825177669525146},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2116425335407257},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19645407795906067},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08901309967041016},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08354976773262024}],"concepts":[{"id":"https://openalex.org/C192328126","wikidata":"https://www.wikidata.org/wiki/Q4514647","display_name":"Schematic","level":2,"score":0.8222675919532776},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.7364920377731323},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.7087323665618896},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6926868557929993},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5090531706809998},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4938862919807434},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.47336336970329285},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.441113144159317},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.43231356143951416},{"id":"https://openalex.org/C38349280","wikidata":"https://www.wikidata.org/wiki/Q1434290","display_name":"Flow (mathematics)","level":2,"score":0.4310457110404968},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.41434773802757263},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.39495551586151123},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.31791558861732483},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.26825177669525146},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2116425335407257},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19645407795906067},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08901309967041016},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08354976773262024},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/ddecs.2019.8724669","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2019.8724669","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE 22nd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"},{"id":"pmh:oai:fraunhofer.de:N-543679","is_oa":true,"landing_page_url":"http://publica.fraunhofer.de/documents/N-543679.html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400801","display_name":"Publikationsdatenbank der Fraunhofer-Gesellschaft (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Fraunhofer EAS","raw_type":"conferenceObject"},{"id":"pmh:oai:publica.fraunhofer.de:publica/404550","is_oa":false,"landing_page_url":"https://publica.fraunhofer.de/handle/publica/404550","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"conference paper"}],"best_oa_location":{"id":"pmh:oai:fraunhofer.de:N-543679","is_oa":true,"landing_page_url":"http://publica.fraunhofer.de/documents/N-543679.html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400801","display_name":"Publikationsdatenbank der Fraunhofer-Gesellschaft (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Fraunhofer EAS","raw_type":"conferenceObject"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W566385658","https://openalex.org/W1974312848","https://openalex.org/W2102933388","https://openalex.org/W2141750279","https://openalex.org/W2148556461","https://openalex.org/W2156152281","https://openalex.org/W2475898412","https://openalex.org/W2487597712","https://openalex.org/W2496172083","https://openalex.org/W2522348360","https://openalex.org/W2546380096","https://openalex.org/W2735434848","https://openalex.org/W2809379360","https://openalex.org/W2885593162","https://openalex.org/W2935898307","https://openalex.org/W3217674252","https://openalex.org/W4236728296","https://openalex.org/W6727261466","https://openalex.org/W6729318695","https://openalex.org/W6945452504"],"related_works":["https://openalex.org/W3011978806","https://openalex.org/W2059530328","https://openalex.org/W2743305891","https://openalex.org/W3205162826","https://openalex.org/W3207169898","https://openalex.org/W3198354237","https://openalex.org/W2951650892","https://openalex.org/W2331259470","https://openalex.org/W2295569708","https://openalex.org/W4242619554"],"abstract_inverted_index":{"The":[0,92],"effort":[1,32],"in":[2,16,31,98],"designing":[3],"analog/mixed-signal":[4],"(AMS)":[5],"integrated":[6],"circuits":[7],"is":[8],"characterized":[9],"by":[10],"the":[11,17,26,40],"largely":[12],"manual":[13],"work":[14],"involved":[15],"design":[18,61,102],"of":[19,42,89,94,109],"analog":[20,34,74],"cells":[21,37],"and":[22,35,80,86],"their":[23],"integration":[24],"into":[25],"overall":[27],"circuit.":[28],"This":[29],"inequality":[30],"between":[33],"digital":[36],"increases":[38],"with":[39,104],"use":[41],"modern,":[43],"more":[44],"complex":[45],"technology":[46],"nodes.":[47],"To":[48],"mitigate":[49],"this":[50,52],"problem,":[51],"paper":[53],"presents":[54],"four":[55],"methods":[56],"to":[57],"improve":[58],"existing":[59],"mixed-signal":[60],"flows:":[62],"(1)":[63],"automatic":[64,73],"schematic":[65],"generation":[66],"from":[67],"a":[68,99,105],"system-level":[69],"model,":[70],"(2)":[71],"flexible":[72],"layout":[75],"generation,":[76],"(3)":[77],"constraint":[78],"propagation":[79],"budget":[81],"calculation":[82],"for":[83],"dependency":[84],"resolution,":[85],"(4)":[87],"verification":[88],"nonfunctional":[90],"effects.":[91],"implementation":[93],"these":[95],"steps":[96],"results":[97],"novel":[100],"AMS":[101],"flow":[103],"significantly":[106],"higher":[107],"degree":[108],"automation.":[110]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2026-03-28T08:17:26.163206","created_date":"2025-10-10T00:00:00"}