{"id":"https://openalex.org/W2618398667","doi":"https://doi.org/10.1109/ddecs.2017.7934579","title":"Implementation of an asynchronous bundled-data router for a GALS NoC in the context of a VSoC","display_name":"Implementation of an asynchronous bundled-data router for a GALS NoC in the context of a VSoC","publication_year":2017,"publication_date":"2017-04-01","ids":{"openalex":"https://openalex.org/W2618398667","doi":"https://doi.org/10.1109/ddecs.2017.7934579","mag":"2618398667"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2017.7934579","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2017.7934579","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems (DDECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://publica.fraunhofer.de/documents/N-442563.html","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5044855066","display_name":"Patrick Russell","orcid":"https://orcid.org/0000-0001-5320-7222"},"institutions":[{"id":"https://openalex.org/I4210095661","display_name":"Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS","ror":"https://ror.org/00s5yp124","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210095661","https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Patrick Russell","raw_affiliation_strings":["Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany","institution_ids":["https://openalex.org/I4210095661"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029436588","display_name":"Jens D\u00f6ge","orcid":"https://orcid.org/0000-0002-2891-984X"},"institutions":[{"id":"https://openalex.org/I4210095661","display_name":"Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS","ror":"https://ror.org/00s5yp124","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210095661","https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jens Doge","raw_affiliation_strings":["Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany","institution_ids":["https://openalex.org/I4210095661"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064577738","display_name":"Christoph Hoppe","orcid":null},"institutions":[{"id":"https://openalex.org/I4210095661","display_name":"Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS","ror":"https://ror.org/00s5yp124","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210095661","https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Christoph Hoppe","raw_affiliation_strings":["Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany","institution_ids":["https://openalex.org/I4210095661"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055093027","display_name":"Thomas B. Preu\u00dfer","orcid":"https://orcid.org/0000-0003-3998-7896"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"Technische Universit\u00e4t Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Thomas B. Preusser","raw_affiliation_strings":["Technische Universit\u00e4t Dresden, Institute of Computer Engineering, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t Dresden, Institute of Computer Engineering, Germany","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069006979","display_name":"Peter Reichel","orcid":"https://orcid.org/0000-0001-7149-8238"},"institutions":[{"id":"https://openalex.org/I4210095661","display_name":"Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS","ror":"https://ror.org/00s5yp124","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210095661","https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Peter Reichel","raw_affiliation_strings":["Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany","institution_ids":["https://openalex.org/I4210095661"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5038255244","display_name":"Peter Schneider","orcid":"https://orcid.org/0000-0003-2509-021X"},"institutions":[{"id":"https://openalex.org/I4210095661","display_name":"Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems EAS","ror":"https://ror.org/00s5yp124","country_code":"DE","type":"facility","lineage":["https://openalex.org/I4210095661","https://openalex.org/I4210124274","https://openalex.org/I4923324"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Peter Schneider","raw_affiliation_strings":["Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Fraunhofer Institute for Integrated Circuits IIS, Divison Engineering of Adaptive Systems EAS, Dresden, Germany","institution_ids":["https://openalex.org/I4210095661"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.8788,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.77213664,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"195","last_page":"200"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.9166795015335083},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8043538331985474},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.726372480392456},{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.6714655160903931},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.611209511756897},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5477466583251953},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.5011045932769775},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.49178650975227356},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4475546181201935},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.44546592235565186},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.4357132315635681},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.4149009585380554},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.318319171667099},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.14805319905281067},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.09484505653381348},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.07674244046211243}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.9166795015335083},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8043538331985474},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.726372480392456},{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.6714655160903931},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.611209511756897},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5477466583251953},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.5011045932769775},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.49178650975227356},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4475546181201935},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.44546592235565186},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.4357132315635681},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.4149009585380554},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.318319171667099},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.14805319905281067},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.09484505653381348},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.07674244046211243},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/ddecs.2017.7934579","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2017.7934579","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE 20th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems (DDECS)","raw_type":"proceedings-article"},{"id":"pmh:oai:fraunhofer.de:N-442563","is_oa":true,"landing_page_url":"http://publica.fraunhofer.de/documents/N-442563.html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Fraunhofer EAS","raw_type":"conferenceObject"},{"id":"pmh:oai:publica.fraunhofer.de:publica/396432","is_oa":false,"landing_page_url":"https://publica.fraunhofer.de/handle/publica/396432","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"conference paper"}],"best_oa_location":{"id":"pmh:oai:fraunhofer.de:N-442563","is_oa":true,"landing_page_url":"http://publica.fraunhofer.de/documents/N-442563.html","pdf_url":null,"source":{"id":"https://openalex.org/S4306400318","display_name":"Fraunhofer-Publica (Fraunhofer-Gesellschaft)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4923324","host_organization_name":"Fraunhofer-Gesellschaft","host_organization_lineage":["https://openalex.org/I4923324"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Fraunhofer EAS","raw_type":"conferenceObject"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.46000000834465027}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321114","display_name":"Bundesministerium f\u00fcr Bildung und Forschung","ror":"https://ror.org/04pz7b180"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1932488214","https://openalex.org/W2010800225","https://openalex.org/W2013876999","https://openalex.org/W2034809602","https://openalex.org/W2035024806","https://openalex.org/W2037181413","https://openalex.org/W2085176118","https://openalex.org/W2114453311","https://openalex.org/W2123184444","https://openalex.org/W2168082067","https://openalex.org/W2178247634","https://openalex.org/W4241462776","https://openalex.org/W4251474723"],"related_works":["https://openalex.org/W4312516786","https://openalex.org/W1502478103","https://openalex.org/W2109350679","https://openalex.org/W2093992207","https://openalex.org/W2548837243","https://openalex.org/W4244147444","https://openalex.org/W2154582989","https://openalex.org/W4256596352","https://openalex.org/W2093491063","https://openalex.org/W2161215820"],"abstract_inverted_index":{"Designs":[0],"of":[1,5,18,28,57,69,79],"asynchronous":[2,11,22,59,80],"networks-on-chip":[3],"are":[4,41],"growing":[6],"interest":[7],"because":[8,32],"a":[9,64,70,98],"complete":[10],"implementation":[12,56],"can":[13],"solve":[14],"the":[15,26,53,67,77],"synchronization":[16],"problems":[17],"large":[19],"networks.":[20],"However,":[21],"circuits":[23],"suffer":[24],"from":[25],"lack":[27],"proper":[29],"design":[30,54,74],"flows":[31],"their":[33],"functionality":[34],"often":[35],"relies":[36],"on":[37,85],"timing":[38],"constraints,":[39],"which":[40],"not":[42],"extensively":[43],"supported":[44],"by":[45],"common":[46,86],"CAD":[47],"synthesis":[48,78,87],"tools.":[49],"This":[50],"paper":[51],"proposes":[52],"and":[55,97],"an":[58],"router":[60],"architecture":[61],"suitable":[62],"for":[63,76],"network-on-chip":[65],"in":[66],"context":[68],"Vision-System-on-Chip.":[71],"The":[72],"developed":[73],"flow":[75],"bundled-data":[81],"pipelines":[82],"is":[83],"based":[84],"tools":[88],"and,":[89],"therefore,":[90],"enables":[91],"high":[92],"compatibility":[93],"with":[94],"synchronous":[95],"designs":[96],"low":[99],"barrier":[100],"to":[101],"entry.":[102]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
