{"id":"https://openalex.org/W2412622607","doi":"https://doi.org/10.1109/ddecs.2016.7482457","title":"Comparison of gate-driven and bulk-driven current mirror topologies","display_name":"Comparison of gate-driven and bulk-driven current mirror topologies","publication_year":2016,"publication_date":"2016-04-01","ids":{"openalex":"https://openalex.org/W2412622607","doi":"https://doi.org/10.1109/ddecs.2016.7482457","mag":"2412622607"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2016.7482457","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2016.7482457","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065193963","display_name":"Matej Rak\u00fas","orcid":null},"institutions":[{"id":"https://openalex.org/I110757952","display_name":"Slovak University of Technology in Bratislava","ror":"https://ror.org/0561ghm58","country_code":"SK","type":"education","lineage":["https://openalex.org/I110757952"]}],"countries":["SK"],"is_corresponding":true,"raw_author_name":"Matej Rakus","raw_affiliation_strings":["Faculty of Electrical Engeneering and Information Technology, Slovak University of Technology, Bratislava, Slovakia"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engeneering and Information Technology, Slovak University of Technology, Bratislava, Slovakia","institution_ids":["https://openalex.org/I110757952"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030204131","display_name":"Viera Stopjakov\u00e1","orcid":"https://orcid.org/0000-0002-0010-8965"},"institutions":[{"id":"https://openalex.org/I110757952","display_name":"Slovak University of Technology in Bratislava","ror":"https://ror.org/0561ghm58","country_code":"SK","type":"education","lineage":["https://openalex.org/I110757952"]}],"countries":["SK"],"is_corresponding":false,"raw_author_name":"Viera Stopjakova","raw_affiliation_strings":["Slovenska Technicka Univerzita, Bratislava, SK"],"affiliations":[{"raw_affiliation_string":"Slovenska Technicka Univerzita, Bratislava, SK","institution_ids":["https://openalex.org/I110757952"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082791477","display_name":"Daniel Arbet","orcid":"https://orcid.org/0000-0001-9412-4503"},"institutions":[{"id":"https://openalex.org/I110757952","display_name":"Slovak University of Technology in Bratislava","ror":"https://ror.org/0561ghm58","country_code":"SK","type":"education","lineage":["https://openalex.org/I110757952"]}],"countries":["SK"],"is_corresponding":false,"raw_author_name":"Daniel Arbet","raw_affiliation_strings":["Faculty of Electrical Engeneering and Information Technology, Slovak University of Technology, Bratislava, Slovakia"],"affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engeneering and Information Technology, Slovak University of Technology, Bratislava, Slovakia","institution_ids":["https://openalex.org/I110757952"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5065193963"],"corresponding_institution_ids":["https://openalex.org/I110757952"],"apc_list":null,"apc_paid":null,"fwci":1.3675,"has_fulltext":false,"cited_by_count":17,"citation_normalized_percentile":{"value":0.80334509,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"32","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.7536288499832153},{"id":"https://openalex.org/keywords/current","display_name":"Current (fluid)","score":0.6051449775695801},{"id":"https://openalex.org/keywords/current-mirror","display_name":"Current mirror","score":0.4953576326370239},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.48180335760116577},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4294980764389038},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3720991611480713},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3667399287223816},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3590546250343323},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.3350565433502197},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16869333386421204},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1522166132926941},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11250543594360352},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.11030277609825134}],"concepts":[{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.7536288499832153},{"id":"https://openalex.org/C148043351","wikidata":"https://www.wikidata.org/wiki/Q4456944","display_name":"Current (fluid)","level":2,"score":0.6051449775695801},{"id":"https://openalex.org/C173966970","wikidata":"https://www.wikidata.org/wiki/Q786012","display_name":"Current mirror","level":4,"score":0.4953576326370239},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48180335760116577},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4294980764389038},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3720991611480713},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3667399287223816},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3590546250343323},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.3350565433502197},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16869333386421204},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1522166132926941},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11250543594360352},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.11030277609825134}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2016.7482457","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2016.7482457","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.800000011920929,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320323641","display_name":"Vedeck\u00e1 Grantov\u00e1 Agent\u00fara M\u0160VVa\u0160 SR a SAV","ror":"https://ror.org/044gwpv05"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1566916904","https://openalex.org/W2006741221","https://openalex.org/W2033021170","https://openalex.org/W2144543694","https://openalex.org/W2148056645","https://openalex.org/W2169924428","https://openalex.org/W2486307037","https://openalex.org/W6633800908","https://openalex.org/W6722575942"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2899084033","https://openalex.org/W2039950253","https://openalex.org/W2115209058","https://openalex.org/W1559409536","https://openalex.org/W1528136880","https://openalex.org/W2542079165","https://openalex.org/W2201358726","https://openalex.org/W2129578106","https://openalex.org/W4281297712"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"different":[3],"topologies":[4,69],"of":[5,37,51,61,78],"gate-driven":[6,74],"and":[7,81],"bulk-driven":[8,28,46,90],"current":[9,47,67],"mirrors":[10],"designed":[11],"in":[12,76],"90":[13],"nm":[14],"CMOS":[15],"technology":[16,43],"are":[17],"presented.":[18],"Since":[19],"the":[20,38,58,89],"conventional":[21],"MOS":[22,64],"transistors":[23],"can":[24],"work":[25],"as":[26],"a":[27,62],"device,":[29],"there":[30],"is":[31,49,93],"no":[32],"need":[33],"for":[34],"any":[35],"modification":[36],"existing":[39],"MOSFET":[40],"structure":[41],"or":[42],"process.":[44],"The":[45,84],"mirror":[48,68],"capable":[50],"operating":[52],"at":[53],"power":[54],"supplies":[55],"down":[56],"to":[57,72],"threshold":[59],"voltage":[60],"standard":[63],"device.":[65],"Bulk-driven":[66],"were":[70],"compared":[71],"their":[73],"equivalents":[75],"terms":[77],"main":[79],"properties":[80],"output":[82],"characteristics.":[83],"achieved":[85],"results":[86],"prove":[87],"that":[88],"design":[91],"technique":[92],"very":[94],"promising":[95],"towards":[96],"ultra":[97],"low-voltage":[98],"analog":[99],"ICs.":[100]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":5},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}