{"id":"https://openalex.org/W2144421022","doi":"https://doi.org/10.1109/ddecs.2014.6868810","title":"Numerical and theoretical analysis on voltage and time domain dynamic range of scaled CMOS circuits","display_name":"Numerical and theoretical analysis on voltage and time domain dynamic range of scaled CMOS circuits","publication_year":2014,"publication_date":"2014-04-01","ids":{"openalex":"https://openalex.org/W2144421022","doi":"https://doi.org/10.1109/ddecs.2014.6868810","mag":"2144421022"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2014.6868810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2014.6868810","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082616004","display_name":"Kevin Ngari Muriithi","orcid":null},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kevin Ngari Muriithi","raw_affiliation_strings":["VLSI Design and Education Center (VDEC), The University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center (VDEC), The University of Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071803491","display_name":"Toru Nakura","orcid":"https://orcid.org/0000-0001-5945-3918"},"institutions":[{"id":"https://openalex.org/I14396692","display_name":"Tokyo University of Information Sciences","ror":"https://ror.org/044bdx604","country_code":"JP","type":"education","lineage":["https://openalex.org/I14396692"]},{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toru Nakura","raw_affiliation_strings":["Department of Electrical Engineering and Information Systems, The University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Systems, The University of Tokyo, Japan","institution_ids":["https://openalex.org/I14396692","https://openalex.org/I74801974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028680447","display_name":"Kunihiro Asada","orcid":"https://orcid.org/0000-0002-1150-0241"},"institutions":[{"id":"https://openalex.org/I14396692","display_name":"Tokyo University of Information Sciences","ror":"https://ror.org/044bdx604","country_code":"JP","type":"education","lineage":["https://openalex.org/I14396692"]},{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kunihiro Asada","raw_affiliation_strings":["Department of Electrical Engineering and Information Systems, The University of Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Information Systems, The University of Tokyo, Japan","institution_ids":["https://openalex.org/I14396692","https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"56","issue":null,"first_page":"282","last_page":"285"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12300","display_name":"Advanced Electrical Measurement Techniques","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7716578245162964},{"id":"https://openalex.org/keywords/dynamic-range","display_name":"Dynamic range","score":0.6350308060646057},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.56169193983078},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5398814678192139},{"id":"https://openalex.org/keywords/time-domain","display_name":"Time domain","score":0.5228750705718994},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5070574283599854},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.4722639322280884},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.4492168426513672},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.42565256357192993},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.41363629698753357},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3995283842086792},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.19149255752563477},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17293328046798706},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.152822345495224}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7716578245162964},{"id":"https://openalex.org/C87133666","wikidata":"https://www.wikidata.org/wiki/Q1161699","display_name":"Dynamic range","level":2,"score":0.6350308060646057},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.56169193983078},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5398814678192139},{"id":"https://openalex.org/C103824480","wikidata":"https://www.wikidata.org/wiki/Q185889","display_name":"Time domain","level":2,"score":0.5228750705718994},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5070574283599854},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.4722639322280884},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.4492168426513672},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.42565256357192993},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.41363629698753357},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3995283842086792},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.19149255752563477},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17293328046798706},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.152822345495224},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2014.6868810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2014.6868810","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6000000238418579,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322832","display_name":"University of Tokyo","ror":"https://ror.org/057zh3y96"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2105980164","https://openalex.org/W2146050991","https://openalex.org/W2163630970"],"related_works":["https://openalex.org/W2121182846","https://openalex.org/W2315668284","https://openalex.org/W2155789024","https://openalex.org/W2109491806","https://openalex.org/W3213608175","https://openalex.org/W2389800961","https://openalex.org/W2004664178","https://openalex.org/W1995389502","https://openalex.org/W2995582362","https://openalex.org/W785445970"],"abstract_inverted_index":{"It":[0,124],"is":[1,13,32,79,138,163,170],"believed":[2],"that":[3,33,82,128],"the":[4,16,40,51,94,97,120,133,141,164,171],"time-domain":[5,98],"resolution":[6,18],"of":[7,19,67,75,96,105,149],"a":[8,80,130,147],"digital":[9],"signal":[10,22,41],"edge":[11],"transition":[12],"superior":[14,139],"to":[15,44,48,60,73,140],"voltage":[17,35,142],"an":[20],"analog":[21],"in":[23,54,62,103,119],"advanced":[24],"CMOS":[25],"processes[1],":[26],"[2].":[27],"The":[28],"reasoning":[29],"behind":[30],"this":[31,78],"operating":[34],"has":[36,58,83,125],"been":[37,86,126],"reducing,":[38],"making":[39],"more":[42],"vulnerable":[43],"noise":[45],"power":[46],"due":[47],"scaling.":[49],"On":[50],"other":[52],"hand,":[53],"time":[55,134],"domain,":[56],"scaling":[57],"resulted":[59],"increase":[61],"frequency":[63,167],"and":[64,168],"therefore":[65],"design":[66],"faster":[68],"circuits,":[69],"while":[70],"also":[71],"contributing":[72],"reduction":[74],"jitter.":[76],"However,":[77],"concept":[81],"not":[84],"yet":[85],"quantitatively":[87],"examined.":[88],"This":[89],"paper":[90],"aims":[91],"at":[92],"verifying":[93],"effectiveness":[95],"circuits":[99,102],"over":[100],"voltage-domain":[101],"terms":[104],"their":[106],"dynamic":[107,136,144],"range":[108,137,145],"performances":[109],"by":[110,115,146],"simulations":[111],"as":[112,114],"well":[113],"theoretical":[116],"analysis,":[117],"especially":[118],"scaled":[121],"nano-meter":[122],"processes.":[123],"shown":[127],"for":[129],"given":[131],"technology":[132],"domain":[135,143],"factor":[148],"(\u03c9":[150],"<sub":[151,160],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[152,156,161],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">T</sub>":[153,162],"/B)":[154],"<sup":[155],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[157],"where":[158],"\u03c9":[159],"unity":[165],"gain":[166],"B":[169],"bandwidth.":[172]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
