{"id":"https://openalex.org/W2139813344","doi":"https://doi.org/10.1109/ddecs.2014.6868786","title":"CRC based hashing in FPGA using DSP blocks","display_name":"CRC based hashing in FPGA using DSP blocks","publication_year":2014,"publication_date":"2014-04-01","ids":{"openalex":"https://openalex.org/W2139813344","doi":"https://doi.org/10.1109/ddecs.2014.6868786","mag":"2139813344"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2014.6868786","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2014.6868786","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067614736","display_name":"Tom\u00e1\u0161 Z\u00e1vodn\u00edk","orcid":null},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":true,"raw_author_name":"Tomas Zavodnik","raw_affiliation_strings":["Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic","[Faculty of Information Technology, Brno University of Technology, Bo\u017eet\u011bchova 2, 612 66, Czech Republic]"],"affiliations":[{"raw_affiliation_string":"Faculty of Information Technology, Brno University of Technology, Brno, Czech Republic","institution_ids":["https://openalex.org/I60587646"]},{"raw_affiliation_string":"[Faculty of Information Technology, Brno University of Technology, Bo\u017eet\u011bchova 2, 612 66, Czech Republic]","institution_ids":["https://openalex.org/I60587646"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076081443","display_name":"Luk\u00e1\u0161 Kekely","orcid":"https://orcid.org/0000-0001-8257-8129"},"institutions":[{"id":"https://openalex.org/I54634078","display_name":"Czech Education and Scientific Network","ror":"https://ror.org/050dkka69","country_code":"CZ","type":"other","lineage":["https://openalex.org/I54634078"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Lukas Kekely","raw_affiliation_strings":["CESNET, Prague, Czech Republic","CESNET a. l. e., Zikova 4, 160 00 Prague, Czech Republic"],"affiliations":[{"raw_affiliation_string":"CESNET, Prague, Czech Republic","institution_ids":["https://openalex.org/I54634078"]},{"raw_affiliation_string":"CESNET a. l. e., Zikova 4, 160 00 Prague, Czech Republic","institution_ids":["https://openalex.org/I54634078"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5089906795","display_name":"Viktor Pu\u0161","orcid":null},"institutions":[{"id":"https://openalex.org/I54634078","display_name":"Czech Education and Scientific Network","ror":"https://ror.org/050dkka69","country_code":"CZ","type":"other","lineage":["https://openalex.org/I54634078"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Viktor Pus","raw_affiliation_strings":["CESNET, Prague, Czech Republic","CESNET a. l. e., Zikova 4, 160 00 Prague, Czech Republic"],"affiliations":[{"raw_affiliation_string":"CESNET, Prague, Czech Republic","institution_ids":["https://openalex.org/I54634078"]},{"raw_affiliation_string":"CESNET a. l. e., Zikova 4, 160 00 Prague, Czech Republic","institution_ids":["https://openalex.org/I54634078"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5067614736"],"corresponding_institution_ids":["https://openalex.org/I60587646"],"apc_list":null,"apc_paid":null,"fwci":0.409,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.75395103,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"1","issue":null,"first_page":"179","last_page":"182"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8210726976394653},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7805769443511963},{"id":"https://openalex.org/keywords/hash-function","display_name":"Hash function","score":0.648432195186615},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.6254159808158875},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5186366438865662},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5151304006576538},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5114344954490662},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5014011859893799},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.44808733463287354},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.401019424200058},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3548855781555176},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2857200503349304},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.06929033994674683},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.06460747122764587}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8210726976394653},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7805769443511963},{"id":"https://openalex.org/C99138194","wikidata":"https://www.wikidata.org/wiki/Q183427","display_name":"Hash function","level":2,"score":0.648432195186615},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.6254159808158875},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5186366438865662},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5151304006576538},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5114344954490662},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5014011859893799},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.44808733463287354},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.401019424200058},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3548855781555176},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2857200503349304},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06929033994674683},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.06460747122764587},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2014.6868786","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2014.6868786","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W100509257","https://openalex.org/W1566480155","https://openalex.org/W2090150216","https://openalex.org/W2141858013","https://openalex.org/W6633736210"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W4200391368","https://openalex.org/W2210979487","https://openalex.org/W2074043759","https://openalex.org/W3042736233","https://openalex.org/W2082487009","https://openalex.org/W2390348052","https://openalex.org/W2373535795","https://openalex.org/W1876592433","https://openalex.org/W2083269738"],"abstract_inverted_index":{"We":[0,62,87],"propose":[1,88],"a":[2,89],"novel":[3],"approach":[4,24],"to":[5,71,94],"the":[6,9,35,64,74,96,99,104],"computation":[7],"of":[8,51,98,115],"CRC":[10],"functions,":[11],"commonly":[12],"used":[13],"for":[14,27,33,45],"bit":[15],"error":[16],"checking":[17],"purposes":[18,30],"when":[19],"handling":[20],"binary":[21],"data.":[22],"This":[23],"is":[25,43],"designed":[26],"general":[28],"hashing":[29],"in":[31,68],"FPGA,":[32],"which":[34,47],"CRCs":[36],"are":[37],"usable":[38],"as":[39,59],"well.":[40],"The":[41],"method":[42],"suitable":[44],"applications":[46],"use":[48],"parallel":[49],"inputs":[50],"fixed":[52],"size":[53],"and":[54],"require":[55],"high":[56],"throughput,":[57],"such":[58],"hash":[60],"tables.":[61],"employ":[63],"DSP":[65,100,112],"blocks":[66,101],"present":[67],"modern":[69],"FPGAs":[70],"perform":[72],"all":[73],"necessary":[75],"XOR":[76,117],"operations,":[77],"so":[78],"that":[79,110],"our":[80],"solution":[81],"does":[82],"not":[83],"consume":[84],"any":[85],"LUTs.":[86,124],"Monte":[90],"Carlo":[91],"based":[92],"heuristic":[93],"reduce":[95],"number":[97],"required":[102],"by":[103],"computation.":[105],"Our":[106],"experimental":[107],"results":[108],"show":[109],"one":[111],"block":[113],"capable":[114],"48":[116],"operations":[118],"can":[119],"replace":[120],"around":[121],"eleven":[122],"6-input":[123]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}