{"id":"https://openalex.org/W2127405288","doi":"https://doi.org/10.1109/ddecs.2014.6868762","title":"A 64-MHz&amp;#x223C;640-MHz 64-phase clock generator","display_name":"A 64-MHz&amp;#x223C;640-MHz 64-phase clock generator","publication_year":2014,"publication_date":"2014-04-01","ids":{"openalex":"https://openalex.org/W2127405288","doi":"https://doi.org/10.1109/ddecs.2014.6868762","mag":"2127405288"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2014.6868762","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2014.6868762","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022417847","display_name":"Hong\u2010Yi Huang","orcid":"https://orcid.org/0000-0002-6556-3256"},"institutions":[{"id":"https://openalex.org/I99613584","display_name":"National Taipei University","ror":"https://ror.org/03e29r284","country_code":"TW","type":"education","lineage":["https://openalex.org/I99613584"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hong-Yi Huang","raw_affiliation_strings":["Department of Electrical Engineering, National Taipei University, Taiwan","Department of Electrical Engineering, National Taipei University, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taipei University, Taiwan","institution_ids":["https://openalex.org/I99613584"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Taipei University, Taiwan#TAB#","institution_ids":["https://openalex.org/I99613584"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025566121","display_name":"Jen\u2010Chieh Liu","orcid":"https://orcid.org/0000-0002-7045-6586"},"institutions":[{"id":"https://openalex.org/I142066694","display_name":"ITRI International","ror":"https://ror.org/04wwsbd59","country_code":"US","type":"facility","lineage":["https://openalex.org/I142066694"]},{"id":"https://openalex.org/I4210148468","display_name":"Industrial Technology Research Institute","ror":"https://ror.org/05szzwt63","country_code":"TW","type":"nonprofit","lineage":["https://openalex.org/I4210148468"]}],"countries":["TW","US"],"is_corresponding":false,"raw_author_name":"Jen-Chieh Liu","raw_affiliation_strings":["Information and Communications Research Laboratories, Industrial Technology Research Institute, Taiwan","[Information and Communications Research Laboratories, Industrial Technology Research Institute, Taiwan]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Information and Communications Research Laboratories, Industrial Technology Research Institute, Taiwan","institution_ids":["https://openalex.org/I4210148468"]},{"raw_affiliation_string":"[Information and Communications Research Laboratories, Industrial Technology Research Institute, Taiwan]","institution_ids":["https://openalex.org/I142066694"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061847409","display_name":"Shi-Jia Sun","orcid":null},"institutions":[{"id":"https://openalex.org/I99613584","display_name":"National Taipei University","ror":"https://ror.org/03e29r284","country_code":"TW","type":"education","lineage":["https://openalex.org/I99613584"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shi-Jia Sun","raw_affiliation_strings":["Department of Electrical Engineering, National Taipei University, Taiwan","Department of Electrical Engineering, National Taipei University, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taipei University, Taiwan","institution_ids":["https://openalex.org/I99613584"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Taipei University, Taiwan#TAB#","institution_ids":["https://openalex.org/I99613584"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103007969","display_name":"Chenghao Fu","orcid":"https://orcid.org/0000-0002-4891-1618"},"institutions":[{"id":"https://openalex.org/I99613584","display_name":"National Taipei University","ror":"https://ror.org/03e29r284","country_code":"TW","type":"education","lineage":["https://openalex.org/I99613584"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng-Hao Fu","raw_affiliation_strings":["Department of Electrical Engineering, National Taipei University, Taiwan","Department of Electrical Engineering, National Taipei University, Taiwan#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taipei University, Taiwan","institution_ids":["https://openalex.org/I99613584"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Taipei University, Taiwan#TAB#","institution_ids":["https://openalex.org/I99613584"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101981427","display_name":"Kuo\u2010Hsing Cheng","orcid":"https://orcid.org/0000-0002-0997-5264"},"institutions":[{"id":"https://openalex.org/I22265921","display_name":"National Central University","ror":"https://ror.org/00944ve71","country_code":"TW","type":"education","lineage":["https://openalex.org/I22265921"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kuo-Hsing Cheng","raw_affiliation_strings":["Department of Electrical Engineering, National Central University, Taiwan","Department of Electrical Engineering, National Central University, , Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, Taiwan","institution_ids":["https://openalex.org/I22265921"]},{"raw_affiliation_string":"Department of Electrical Engineering, National Central University, , Taiwan","institution_ids":["https://openalex.org/I22265921"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13714079,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"51","last_page":"54"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.9299592971801758},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8837292194366455},{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.6512652039527893},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.6125337481498718},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5839313268661499},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5721712112426758},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.5456656813621521},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5257003307342529},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.4672871232032776},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45606979727745056},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.44793426990509033},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.44242241978645325},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4275768995285034},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.384895920753479},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.32076355814933777},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23728567361831665},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.1518201231956482}],"concepts":[{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.9299592971801758},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8837292194366455},{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.6512652039527893},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.6125337481498718},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5839313268661499},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5721712112426758},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.5456656813621521},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5257003307342529},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.4672871232032776},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45606979727745056},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.44793426990509033},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.44242241978645325},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4275768995285034},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.384895920753479},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.32076355814933777},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23728567361831665},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.1518201231956482},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2014.6868762","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2014.6868762","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"17th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8799999952316284,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1592417479","https://openalex.org/W1789796806","https://openalex.org/W2066136286","https://openalex.org/W2082402887","https://openalex.org/W2098318970","https://openalex.org/W2108185796","https://openalex.org/W2142324750","https://openalex.org/W2172414357","https://openalex.org/W6638103861"],"related_works":["https://openalex.org/W2976219355","https://openalex.org/W3129408886","https://openalex.org/W4233090067","https://openalex.org/W2365946217","https://openalex.org/W1964543336","https://openalex.org/W2139484866","https://openalex.org/W2089131288","https://openalex.org/W2368638770","https://openalex.org/W2285615337","https://openalex.org/W2365449259"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,11,28,49,71],"wide-range":[4],"all-digital":[5],"phase":[6],"locked":[7],"loop":[8],"(ADPLL)":[9],"utilizing":[10],"successive":[12],"approximation":[13],"register-controlled":[14],"(SAR)":[15],"architecture.":[16],"A":[17,56,65],"modified":[18],"digital":[19],"to":[20,26,91],"voltage":[21,31,35],"converter":[22],"(DAC)":[23],"is":[24,59,68,88,96,103],"adopted":[25],"provide":[27],"wide":[29,50],"supply":[30],"range":[32,52,87],"for":[33,61],"the":[34,41,63,100],"controlled":[36],"oscillator":[37],"(VCO)":[38],"so":[39],"that":[40],"power":[42],"consumption":[43],"of":[44,78],"can":[45,53],"be":[46,54],"reduced":[47],"and":[48,99],"frequency":[51,86],"operated.":[55],"differential":[57],"VCO":[58],"invented":[60],"reducing":[62],"jitter.":[64],"test":[66],"chip":[67],"implemented":[69],"using":[70],"0.18\u03bcm":[72],"CMOS":[73],"process":[74],"with":[75],"an":[76],"area":[77],"500\u00d7620um":[79],"<sup":[80],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[81],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[82],".":[83],"The":[84,93],"measured":[85],"from":[89],"64MHz":[90],"640MHz.":[92],"p2p":[94],"jitter":[95,102],"20.5":[97],"ps":[98],"rms":[101],"2.4":[104],"ps.":[105]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}