{"id":"https://openalex.org/W1981916297","doi":"https://doi.org/10.1109/ddecs.2012.6219090","title":"Efficient digital design for automotive mixed-signal ASICs using simulink","display_name":"Efficient digital design for automotive mixed-signal ASICs using simulink","publication_year":2012,"publication_date":"2012-04-01","ids":{"openalex":"https://openalex.org/W1981916297","doi":"https://doi.org/10.1109/ddecs.2012.6219090","mag":"1981916297"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2012.6219090","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2012.6219090","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5021336924","display_name":"Andreas Mauderer","orcid":null},"institutions":[{"id":"https://openalex.org/I889804353","display_name":"Robert Bosch (Germany)","ror":"https://ror.org/01fe0jt45","country_code":"DE","type":"company","lineage":["https://openalex.org/I889804353"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Andreas Mauderer","raw_affiliation_strings":["Automotive Electronics, Robert Bosch GmbH, Reutlingen, Germany","Robert Bosch GmbH, Automotive Electronics, T\u00fcbinger Strasse 123, 72762 Reutlingen, Germany"],"affiliations":[{"raw_affiliation_string":"Automotive Electronics, Robert Bosch GmbH, Reutlingen, Germany","institution_ids":["https://openalex.org/I889804353"]},{"raw_affiliation_string":"Robert Bosch GmbH, Automotive Electronics, T\u00fcbinger Strasse 123, 72762 Reutlingen, Germany","institution_ids":["https://openalex.org/I889804353"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049645925","display_name":"Marvin Freier","orcid":"https://orcid.org/0000-0001-5858-6436"},"institutions":[{"id":"https://openalex.org/I889804353","display_name":"Robert Bosch (Germany)","ror":"https://ror.org/01fe0jt45","country_code":"DE","type":"company","lineage":["https://openalex.org/I889804353"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Marvin Freier","raw_affiliation_strings":["Automotive Electronics, Robert Bosch GmbH, Reutlingen, Germany","Robert Bosch GmbH, Automotive Electronics, T\u00fcbinger Strasse 123, 72762 Reutlingen, Germany"],"affiliations":[{"raw_affiliation_string":"Automotive Electronics, Robert Bosch GmbH, Reutlingen, Germany","institution_ids":["https://openalex.org/I889804353"]},{"raw_affiliation_string":"Robert Bosch GmbH, Automotive Electronics, T\u00fcbinger Strasse 123, 72762 Reutlingen, Germany","institution_ids":["https://openalex.org/I889804353"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037107680","display_name":"Jan-Hendrik Oetjens","orcid":null},"institutions":[{"id":"https://openalex.org/I889804353","display_name":"Robert Bosch (Germany)","ror":"https://ror.org/01fe0jt45","country_code":"DE","type":"company","lineage":["https://openalex.org/I889804353"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jan-Hendrik Oetjens","raw_affiliation_strings":["Automotive Electronics, Robert Bosch GmbH, Reutlingen, Germany","Robert Bosch GmbH, Automotive Electronics, T\u00fcbinger Strasse 123, 72762 Reutlingen, Germany"],"affiliations":[{"raw_affiliation_string":"Automotive Electronics, Robert Bosch GmbH, Reutlingen, Germany","institution_ids":["https://openalex.org/I889804353"]},{"raw_affiliation_string":"Robert Bosch GmbH, Automotive Electronics, T\u00fcbinger Strasse 123, 72762 Reutlingen, Germany","institution_ids":["https://openalex.org/I889804353"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087076980","display_name":"Wolfgang Rosenstiel","orcid":null},"institutions":[{"id":"https://openalex.org/I8087733","display_name":"University of T\u00fcbingen","ror":"https://ror.org/03a1kwz48","country_code":"DE","type":"education","lineage":["https://openalex.org/I8087733"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Wolfgang Rosenstiel","raw_affiliation_strings":["Department of Computer Engineering, University of T\u00fcbingen, Tubingen, Germany","University of T\u00fcbingen, Department of Computer Engineering, Sand 13, 72074, Germany"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of T\u00fcbingen, Tubingen, Germany","institution_ids":["https://openalex.org/I8087733"]},{"raw_affiliation_string":"University of T\u00fcbingen, Department of Computer Engineering, Sand 13, 72074, Germany","institution_ids":["https://openalex.org/I8087733"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5021336924"],"corresponding_institution_ids":["https://openalex.org/I889804353"],"apc_list":null,"apc_paid":null,"fwci":0.2901,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.53494473,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":"25","issue":null,"first_page":"372","last_page":"377"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7407756447792053},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.6918436884880066},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.6571287512779236},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.578056275844574},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5649300813674927},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.5448160767555237},{"id":"https://openalex.org/keywords/automotive-industry","display_name":"Automotive industry","score":0.5012924671173096},{"id":"https://openalex.org/keywords/usable","display_name":"USable","score":0.49912118911743164},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.4906848669052124},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.4648541212081909},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.46059951186180115},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44261109828948975},{"id":"https://openalex.org/keywords/digital-signal","display_name":"Digital signal","score":0.43542319536209106},{"id":"https://openalex.org/keywords/model-based-design","display_name":"Model-based design","score":0.421755313873291},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38020214438438416},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.2953287661075592},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2915293574333191},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.20119330286979675},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1524641513824463},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08471488952636719}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7407756447792053},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.6918436884880066},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.6571287512779236},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.578056275844574},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5649300813674927},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.5448160767555237},{"id":"https://openalex.org/C526921623","wikidata":"https://www.wikidata.org/wiki/Q190117","display_name":"Automotive industry","level":2,"score":0.5012924671173096},{"id":"https://openalex.org/C2780615836","wikidata":"https://www.wikidata.org/wiki/Q2471869","display_name":"USable","level":2,"score":0.49912118911743164},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.4906848669052124},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.4648541212081909},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.46059951186180115},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44261109828948975},{"id":"https://openalex.org/C52773712","wikidata":"https://www.wikidata.org/wiki/Q175022","display_name":"Digital signal","level":3,"score":0.43542319536209106},{"id":"https://openalex.org/C195672273","wikidata":"https://www.wikidata.org/wiki/Q6888132","display_name":"Model-based design","level":2,"score":0.421755313873291},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38020214438438416},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.2953287661075592},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2915293574333191},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.20119330286979675},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1524641513824463},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08471488952636719},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2012.6219090","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2012.6219090","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W641037463","https://openalex.org/W1869677288","https://openalex.org/W2132642860","https://openalex.org/W2133896241","https://openalex.org/W2153316377","https://openalex.org/W2166963872","https://openalex.org/W2395217119","https://openalex.org/W6679548904","https://openalex.org/W6712394631"],"related_works":["https://openalex.org/W3011978806","https://openalex.org/W3204573923","https://openalex.org/W3207169898","https://openalex.org/W3198354237","https://openalex.org/W2743305891","https://openalex.org/W4385309418","https://openalex.org/W2331259470","https://openalex.org/W2171946303","https://openalex.org/W2019954703","https://openalex.org/W2535520145"],"abstract_inverted_index":{"In":[0],"common":[1],"design":[2,62,85,136],"flows":[3],"of":[4,48,73,84,133],"mixed-signal":[5,75],"ASICs,":[6],"the":[7,113,121,127,134,142],"transition":[8],"from":[9,45],"system-level":[10],"models":[11,14,50],"to":[12,54,126,144],"implementation-level":[13],"is":[15,77,115,138],"executed":[16],"in":[17,64],"a":[18,61,66,70,74],"manual":[19],"process":[20],"that":[21],"carries":[22],"potential":[23],"for":[24,41,81],"an":[25,39,106,145],"efficiency":[26],"gain":[27],"by":[28,35,140],"automation.":[29],"This":[30],"contribution":[31],"addresses":[32],"this":[33,95],"aspect":[34],"showing":[36],"and":[37,56,79,88,99,103,119],"discussing":[38],"approach":[40],"efficient":[42,90],"automated":[43,82],"transitions":[44],"digital":[46,71,91,122],"parts":[47],"Simulink":[49,67],"representing":[51,69],"heterogeneous":[52,129],"systems":[53],"VHDL":[55],"Verilog":[57],"descriptions.":[58],"It":[59],"describes":[60],"flow,":[63],"which":[65],"model":[68],"part":[72,123],"ASIC":[76],"checked":[78],"optimized":[80],"generation":[83],"rule":[86],"compliant":[87],"more":[89],"hardware":[92,147],"implementations.":[93],"For":[94],"purpose,":[96],"modeling":[97],"guidelines":[98],"optimizations":[100],"were":[101],"implemented":[102],"integrated":[104],"into":[105],"easily":[107],"usable":[108],"graphical":[109],"user":[110],"interface.":[111],"Thereby,":[112],"strategy":[114],"based":[116],"on":[117],"considering":[118],"optimizing":[120],"with":[124],"respect":[125],"surrounding":[128],"system.":[130],"An":[131],"evaluation":[132],"presented":[135],"flow":[137,143],"shown":[139],"applying":[141],"automotive":[146],"design.":[148]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}