{"id":"https://openalex.org/W2111878689","doi":"https://doi.org/10.1109/ddecs.2012.6219084","title":"Test platform for fault tolerant systems design properties verification","display_name":"Test platform for fault tolerant systems design properties verification","publication_year":2012,"publication_date":"2012-04-01","ids":{"openalex":"https://openalex.org/W2111878689","doi":"https://doi.org/10.1109/ddecs.2012.6219084","mag":"2111878689"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2012.6219084","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2012.6219084","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5083343772","display_name":"Martin Straka","orcid":"https://orcid.org/0000-0002-2207-0160"},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Martin Straka","raw_affiliation_strings":["Brno University of Technology, Brno, Czech Republic","Brno University of Technology, Bozetechova 2, 61266, Czech Republic"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Brno University of Technology, Brno, Czech Republic","institution_ids":["https://openalex.org/I60587646"]},{"raw_affiliation_string":"Brno University of Technology, Bozetechova 2, 61266, Czech Republic","institution_ids":["https://openalex.org/I60587646"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036739246","display_name":"Luk\u00e1\u0161 Mi\u010dulka","orcid":null},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Lukas Miculka","raw_affiliation_strings":["Brno University of Technology, Brno, Czech Republic","Brno University of Technology, Bozetechova 2, 61266, Czech Republic"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Brno University of Technology, Brno, Czech Republic","institution_ids":["https://openalex.org/I60587646"]},{"raw_affiliation_string":"Brno University of Technology, Bozetechova 2, 61266, Czech Republic","institution_ids":["https://openalex.org/I60587646"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5045187923","display_name":"Jan Kastil","orcid":"https://orcid.org/0009-0007-2327-3270"},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Jan Kastil","raw_affiliation_strings":["Brno University of Technology, Brno, Czech Republic","Brno University of Technology, Bozetechova 2, 61266, Czech Republic"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Brno University of Technology, Brno, Czech Republic","institution_ids":["https://openalex.org/I60587646"]},{"raw_affiliation_string":"Brno University of Technology, Bozetechova 2, 61266, Czech Republic","institution_ids":["https://openalex.org/I60587646"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040514508","display_name":"Zden\u011bk Kot\u00e1sek","orcid":null},"institutions":[{"id":"https://openalex.org/I60587646","display_name":"Brno University of Technology","ror":"https://ror.org/03613d656","country_code":"CZ","type":"education","lineage":["https://openalex.org/I60587646"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Zdenek Kotasek","raw_affiliation_strings":["Brno University of Technology, Brno, Czech Republic","Brno University of Technology, Bozetechova 2, 61266, Czech Republic"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Brno University of Technology, Brno, Czech Republic","institution_ids":["https://openalex.org/I60587646"]},{"raw_affiliation_string":"Brno University of Technology, Bozetechova 2, 61266, Czech Republic","institution_ids":["https://openalex.org/I60587646"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9993,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.79673876,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"336","last_page":"341"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8945645093917847},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7238456010818481},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6995455026626587},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.601524293422699},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.5924227237701416},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5794905424118042},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.5595107674598694},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.5030929446220398},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.4808700680732727},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.4723469018936157},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4590332508087158},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4544229805469513},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3366602659225464},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.15357643365859985},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.13608631491661072},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.135500967502594},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10090798139572144}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8945645093917847},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7238456010818481},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6995455026626587},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.601524293422699},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5924227237701416},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5794905424118042},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5595107674598694},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.5030929446220398},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.4808700680732727},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.4723469018936157},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4590332508087158},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4544229805469513},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3366602659225464},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.15357643365859985},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.13608631491661072},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.135500967502594},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10090798139572144},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2012.6219084","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2012.6219084","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1591874831","https://openalex.org/W1993237560","https://openalex.org/W2045176743","https://openalex.org/W2053188356","https://openalex.org/W2054149682","https://openalex.org/W2078188073","https://openalex.org/W2099479238","https://openalex.org/W2116587708","https://openalex.org/W2133678523","https://openalex.org/W2137235679","https://openalex.org/W2137969537","https://openalex.org/W2153066308","https://openalex.org/W2169480831","https://openalex.org/W3006277082","https://openalex.org/W6664007176"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W4249632163","https://openalex.org/W1760305469","https://openalex.org/W2797161794","https://openalex.org/W2073075351","https://openalex.org/W2096938998"],"abstract_inverted_index":{"In":[0],"this":[1,94,143],"paper,":[2],"a":[3,19,28,59,84,134],"methodology":[4],"for":[5,18,80,118],"fault":[6,20,89],"tolerant":[7,21,90],"systems":[8],"design":[9],"properties":[10],"verification":[11],"is":[12,74,78],"presented":[13],"together":[14],"with":[15,107,133],"recovery":[16,60],"technique":[17,61],"system":[22],"after":[23,104],"soft":[24],"errors":[25],"occurrence":[26],"in":[27,87,110,124,142],"SRAM-based":[29],"FPGA.":[30],"First,":[31],"the":[32,64,81,88,102,111,119,125],"principles":[33],"of":[34,47,83,93,101,121],"test":[35,48,135],"platform":[36,49,136],"based":[37,62],"on":[38,63],"an":[39,72],"external":[40],"SEU":[41,54],"injector":[42],"are":[43,56,140],"presented;":[44],"all":[45],"components":[46],"and":[50,99,137],"their":[51],"role":[52],"during":[53],"simulation":[55],"described.":[57],"Then,":[58],"generic":[65],"partial":[66],"dynamic":[67],"reconfiguration":[68,92,105,138],"controller":[69,77,114,139],"implemented":[70],"inside":[71],"FPGA":[73,126],"presented.":[75],"The":[76,113,130],"used":[79,117],"identification":[82,120],"faulty":[85],"module":[86,95,103],"system,":[91],"through":[96],"ICAP":[97],"interface":[98],"synchronization":[100],"process":[106],"other":[108],"modules":[109],"system.":[112],"can":[115],"be":[116],"permanent":[122],"faults":[123],"structure":[127],"as":[128],"well.":[129],"first":[131],"experiments":[132],"discussed":[141],"paper.":[144]},"counts_by_year":[{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}