{"id":"https://openalex.org/W2111933818","doi":"https://doi.org/10.1109/ddecs.2012.6219011","title":"Asynchronous circuit design: From basics to practical applications","display_name":"Asynchronous circuit design: From basics to practical applications","publication_year":2012,"publication_date":"2012-04-01","ids":{"openalex":"https://openalex.org/W2111933818","doi":"https://doi.org/10.1109/ddecs.2012.6219011","mag":"2111933818"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2012.6219011","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2012.6219011","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053247434","display_name":"Eckhard Grass","orcid":"https://orcid.org/0000-0002-9718-4170"},"institutions":[{"id":"https://openalex.org/I92894754","display_name":"Innovations for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Eckhard Grass","raw_affiliation_strings":["IHP GmbH, Germany"],"affiliations":[{"raw_affiliation_string":"IHP GmbH, Germany","institution_ids":["https://openalex.org/I92894754"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004959402","display_name":"Milo\u0161 Krsti\u0107","orcid":"https://orcid.org/0000-0003-0267-0203"},"institutions":[{"id":"https://openalex.org/I92894754","display_name":"Innovations for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Milos Krstic","raw_affiliation_strings":["IHP GmbH, Germany"],"affiliations":[{"raw_affiliation_string":"IHP GmbH, Germany","institution_ids":["https://openalex.org/I92894754"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034733719","display_name":"Xin Fan","orcid":"https://orcid.org/0000-0001-6954-5074"},"institutions":[{"id":"https://openalex.org/I92894754","display_name":"Innovations for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Xin Fan","raw_affiliation_strings":["IHP GmbH, Germany"],"affiliations":[{"raw_affiliation_string":"IHP GmbH, Germany","institution_ids":["https://openalex.org/I92894754"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054188213","display_name":"Steffen Zeidler","orcid":null},"institutions":[{"id":"https://openalex.org/I92894754","display_name":"Innovations for High Performance Microelectronics","ror":"https://ror.org/0489gab80","country_code":"DE","type":"facility","lineage":["https://openalex.org/I315704651","https://openalex.org/I92894754"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Steffen Zeidler","raw_affiliation_strings":["IHP GmbH, Germany"],"affiliations":[{"raw_affiliation_string":"IHP GmbH, Germany","institution_ids":["https://openalex.org/I92894754"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5053247434"],"corresponding_institution_ids":["https://openalex.org/I92894754"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15137887,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"5","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.9427714347839355},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7610107660293579},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.6359586715698242},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.45756796002388},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.45255059003829956},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41078606247901917},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1683611273765564},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15592870116233826},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12472912669181824}],"concepts":[{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.9427714347839355},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7610107660293579},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.6359586715698242},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.45756796002388},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.45255059003829956},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41078606247901917},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1683611273765564},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15592870116233826},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12472912669181824},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2012.6219011","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2012.6219011","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4312516786","https://openalex.org/W2146990170","https://openalex.org/W2093992207","https://openalex.org/W2085028021","https://openalex.org/W1993985975","https://openalex.org/W3094139610","https://openalex.org/W2129978639","https://openalex.org/W304800142","https://openalex.org/W2388325543","https://openalex.org/W2035720669"],"abstract_inverted_index":{"After":[0],"motivating":[1],"asynchronous":[2,15,40],"techniques":[3],"in":[4,39],"general,":[5],"the":[6],"main":[7],"advantages":[8],"and":[9,27,34],"disadvantages":[10],"will":[11,31],"be":[12,32],"discussed.":[13],"Several":[14],"timing":[16],"models":[17],"such":[18],"as":[19],"delay":[20,24],"insensitive":[21,25],"(DI)":[22],"quasi":[23],"(QDI)":[26],"speed":[28],"independent":[29],"(SI)":[30],"presented":[33],"compared.":[35],"Completion-detection":[36],"methods":[37],"used":[38],"design":[41],"are":[42],"reviewed.":[43]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}