{"id":"https://openalex.org/W2150086441","doi":"https://doi.org/10.1109/ddecs.2011.5783095","title":"CAD tool for PLL Design","display_name":"CAD tool for PLL Design","publication_year":2011,"publication_date":"2011-04-01","ids":{"openalex":"https://openalex.org/W2150086441","doi":"https://doi.org/10.1109/ddecs.2011.5783095","mag":"2150086441"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2011.5783095","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2011.5783095","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016782917","display_name":"Krzysztof Siwiec","orcid":"https://orcid.org/0000-0003-1333-2883"},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":true,"raw_author_name":"Krzysztof Siwiec","raw_affiliation_strings":["Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, Warsaw, Poland"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, Warsaw, Poland","institution_ids":["https://openalex.org/I108403487"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051716219","display_name":"Tomasz Borejko","orcid":"https://orcid.org/0000-0003-4853-3933"},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Tomasz Borejko","raw_affiliation_strings":["Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, Warsaw, Poland"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, Warsaw, Poland","institution_ids":["https://openalex.org/I108403487"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056589147","display_name":"Witold A. Pleskacz","orcid":"https://orcid.org/0000-0001-7064-503X"},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Witold A. Pleskacz","raw_affiliation_strings":["Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, Warsaw, Poland"],"affiliations":[{"raw_affiliation_string":"Institute of Microelectronics & Optoelectronics, Warsaw University of Technology, Warsaw, Poland","institution_ids":["https://openalex.org/I108403487"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5016782917"],"corresponding_institution_ids":["https://openalex.org/I108403487"],"apc_list":null,"apc_paid":null,"fwci":0.5299,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.72147072,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"283","last_page":"286"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.9519111514091492},{"id":"https://openalex.org/keywords/pll-multibit","display_name":"PLL multibit","score":0.7429276704788208},{"id":"https://openalex.org/keywords/voltage-controlled-oscillator","display_name":"Voltage-controlled oscillator","score":0.6335205435752869},{"id":"https://openalex.org/keywords/phase-noise","display_name":"Phase noise","score":0.5814880728721619},{"id":"https://openalex.org/keywords/matlab","display_name":"MATLAB","score":0.5762858390808105},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.566499650478363},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5621781349182129},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5582136511802673},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.5512017011642456},{"id":"https://openalex.org/keywords/transient","display_name":"Transient (computer programming)","score":0.5169833898544312},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.4891362488269806},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.4731268286705017},{"id":"https://openalex.org/keywords/stability","display_name":"Stability (learning theory)","score":0.42041367292404175},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3043646812438965},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.23968741297721863},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.08566164970397949},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07044932246208191}],"concepts":[{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.9519111514091492},{"id":"https://openalex.org/C77881186","wikidata":"https://www.wikidata.org/wiki/Q7119642","display_name":"PLL multibit","level":4,"score":0.7429276704788208},{"id":"https://openalex.org/C5291336","wikidata":"https://www.wikidata.org/wiki/Q852341","display_name":"Voltage-controlled oscillator","level":3,"score":0.6335205435752869},{"id":"https://openalex.org/C89631360","wikidata":"https://www.wikidata.org/wiki/Q1428766","display_name":"Phase noise","level":2,"score":0.5814880728721619},{"id":"https://openalex.org/C2780365114","wikidata":"https://www.wikidata.org/wiki/Q169478","display_name":"MATLAB","level":2,"score":0.5762858390808105},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.566499650478363},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5621781349182129},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5582136511802673},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.5512017011642456},{"id":"https://openalex.org/C2780799671","wikidata":"https://www.wikidata.org/wiki/Q17087362","display_name":"Transient (computer programming)","level":2,"score":0.5169833898544312},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.4891362488269806},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.4731268286705017},{"id":"https://openalex.org/C112972136","wikidata":"https://www.wikidata.org/wiki/Q7595718","display_name":"Stability (learning theory)","level":2,"score":0.42041367292404175},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3043646812438965},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.23968741297721863},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.08566164970397949},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07044932246208191},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2011.5783095","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2011.5783095","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1775840686","https://openalex.org/W2104340505","https://openalex.org/W2150279044","https://openalex.org/W2160721146","https://openalex.org/W2318911018"],"related_works":["https://openalex.org/W2474043983","https://openalex.org/W1486070987","https://openalex.org/W1600405202","https://openalex.org/W2544336511","https://openalex.org/W2566880546","https://openalex.org/W2078513307","https://openalex.org/W1978186604","https://openalex.org/W2976219355","https://openalex.org/W2144737022","https://openalex.org/W2124954209"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"PLL":[3,53,80,98],"Design":[4],"tool,":[5],"created":[6,48,91],"in":[7],"Matlab":[8],"from":[9],"MathWorks,":[10],"has":[11,82],"been":[12,84],"presented.":[13],"The":[14,47],"tool":[15,49,92],"allows":[16,50],"to":[17,51,87],"analyze":[18,52],"loop":[19,29,35,56,69],"stability":[20,70],"and":[21,42,62,71],"phase":[22],"noise":[23],"of":[24,34],"PLL,":[25],"based":[26,77],"on":[27,68,78,100],"phase-locked":[28],"linear":[30],"model.":[31],"Fast":[32],"evaluation":[33],"filter":[36,57],"components":[37,58],"values":[38],"for":[39,74,97],"popular":[40],"passive":[41],"active":[43],"filters":[44],"is":[45,93],"possible.":[46],"parameters,":[54],"like":[55],"values,":[59],"VCO":[60],"gain":[61],"charge":[63],"pump":[64],"current":[65],"variations":[66],"impact":[67],"phase-noise.":[72],"Algorithm":[73],"phase-noise":[75],"calculation,":[76],"transient":[79],"simulation,":[81],"also":[83],"implemented.":[85],"Thanks":[86],"these":[88],"features":[89],"the":[90],"a":[94],"valuable":[95],"aid":[96],"designer":[99],"all":[101],"design":[102],"steps.":[103]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
