{"id":"https://openalex.org/W2029915748","doi":"https://doi.org/10.1109/ddecs.2010.5491825","title":"Automated SEU fault emulation using partial FPGA reconfiguration","display_name":"Automated SEU fault emulation using partial FPGA reconfiguration","publication_year":2010,"publication_date":"2010-04-01","ids":{"openalex":"https://openalex.org/W2029915748","doi":"https://doi.org/10.1109/ddecs.2010.5491825","mag":"2029915748"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2010.5491825","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2010.5491825","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036176382","display_name":"Uro\u0161 Legat","orcid":null},"institutions":[{"id":"https://openalex.org/I3006985408","display_name":"Jo\u017eef Stefan Institute","ror":"https://ror.org/05060sz93","country_code":"SI","type":"facility","lineage":["https://openalex.org/I3006985408"]}],"countries":["SI"],"is_corresponding":true,"raw_author_name":"Uros Legat","raw_affiliation_strings":["Computer Systems Department, Jozef Stefan Institute, Ljubljana, Slovenia","Comput. Syst. Dept., Jozef Stefan Inst., Ljubljana, Slovenia"],"affiliations":[{"raw_affiliation_string":"Computer Systems Department, Jozef Stefan Institute, Ljubljana, Slovenia","institution_ids":["https://openalex.org/I3006985408"]},{"raw_affiliation_string":"Comput. Syst. Dept., Jozef Stefan Inst., Ljubljana, Slovenia","institution_ids":["https://openalex.org/I3006985408"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020508843","display_name":"Anton Biasizzo","orcid":"https://orcid.org/0000-0002-8188-0606"},"institutions":[{"id":"https://openalex.org/I3006985408","display_name":"Jo\u017eef Stefan Institute","ror":"https://ror.org/05060sz93","country_code":"SI","type":"facility","lineage":["https://openalex.org/I3006985408"]}],"countries":["SI"],"is_corresponding":false,"raw_author_name":"Anton Biasizzo","raw_affiliation_strings":["Computer Systems Department, Jozef Stefan Institute, Ljubljana, Slovenia","Comput. Syst. Dept., Jozef Stefan Inst., Ljubljana, Slovenia"],"affiliations":[{"raw_affiliation_string":"Computer Systems Department, Jozef Stefan Institute, Ljubljana, Slovenia","institution_ids":["https://openalex.org/I3006985408"]},{"raw_affiliation_string":"Comput. Syst. Dept., Jozef Stefan Inst., Ljubljana, Slovenia","institution_ids":["https://openalex.org/I3006985408"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5108583318","display_name":"Franc Novak","orcid":null},"institutions":[{"id":"https://openalex.org/I3006985408","display_name":"Jo\u017eef Stefan Institute","ror":"https://ror.org/05060sz93","country_code":"SI","type":"facility","lineage":["https://openalex.org/I3006985408"]}],"countries":["SI"],"is_corresponding":false,"raw_author_name":"Franc Novak","raw_affiliation_strings":["Computer Systems Department, Jozef Stefan Institute, Ljubljana, Slovenia","Comput. Syst. Dept., Jozef Stefan Inst., Ljubljana, Slovenia"],"affiliations":[{"raw_affiliation_string":"Computer Systems Department, Jozef Stefan Institute, Ljubljana, Slovenia","institution_ids":["https://openalex.org/I3006985408"]},{"raw_affiliation_string":"Comput. Syst. Dept., Jozef Stefan Inst., Ljubljana, Slovenia","institution_ids":["https://openalex.org/I3006985408"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5036176382"],"corresponding_institution_ids":["https://openalex.org/I3006985408"],"apc_list":null,"apc_paid":null,"fwci":2.349,"has_fulltext":false,"cited_by_count":29,"citation_normalized_percentile":{"value":0.88868796,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"24","last_page":"27"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.9422329664230347},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.8195666670799255},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8053744435310364},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7905546426773071},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7692040205001831},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6147987842559814},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.6085476875305176},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.5664376020431519},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.4835807681083679},{"id":"https://openalex.org/keywords/single-event-upset","display_name":"Single event upset","score":0.42451101541519165},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.4128669500350952},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30377721786499023},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25213924050331116},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20882296562194824},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.18929603695869446},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.15508496761322021}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.9422329664230347},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.8195666670799255},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8053744435310364},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7905546426773071},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7692040205001831},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6147987842559814},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.6085476875305176},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.5664376020431519},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.4835807681083679},{"id":"https://openalex.org/C2780073065","wikidata":"https://www.wikidata.org/wiki/Q1476733","display_name":"Single event upset","level":3,"score":0.42451101541519165},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.4128669500350952},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30377721786499023},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25213924050331116},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20882296562194824},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.18929603695869446},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.15508496761322021},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2010.5491825","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2010.5491825","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1761757478","https://openalex.org/W1936283550","https://openalex.org/W2099524419","https://openalex.org/W2101298207","https://openalex.org/W2103698424","https://openalex.org/W2116587708","https://openalex.org/W2119280572","https://openalex.org/W2146311933","https://openalex.org/W2162042417","https://openalex.org/W6640304604","https://openalex.org/W6675061854","https://openalex.org/W6675806323"],"related_works":["https://openalex.org/W2170071008","https://openalex.org/W2103996454","https://openalex.org/W2106791114","https://openalex.org/W3029775214","https://openalex.org/W2291587020","https://openalex.org/W2118560622","https://openalex.org/W2145233434","https://openalex.org/W2951106856","https://openalex.org/W2122965477","https://openalex.org/W2111105659"],"abstract_inverted_index":{"FPGAs":[0],"are":[1,9,62,77],"subjected":[2],"to":[3,11],"SEU":[4,39],"faults.":[5],"Fault":[6],"emulation":[7,29],"methods":[8],"used":[10],"verify":[12],"the":[13,16,19,45,71,75,87],"behavior":[14],"of":[15,21,38,51],"system":[17],"in":[18,53],"presence":[20],"fault.":[22],"In":[23],"this":[24],"paper":[25],"an":[26,67],"automated":[27,36],"fault":[28,40,81],"approach":[30,88],"is":[31,42,59,89],"presented.":[32],"An":[33],"original,":[34],"fully":[35],"extraction":[37],"sources":[41],"introduced":[43],"and":[44,56,86,99],"injection":[46,82],"procedure":[47],"for":[48],"various":[49],"types":[50],"faults":[52,76],"FPGA":[54,94],"configuration":[55],"user":[57],"memory":[58],"explained.":[60],"Faults":[61],"injected":[63],"during":[64],"run-time":[65],"using":[66],"embedded":[68],"microprocessor.":[69],"Only":[70],"resources":[72],"affected":[73],"by":[74],"reconfigured.":[78],"A":[79],"prototype":[80],"tool":[83],"was":[84],"developed":[85],"demonstrated":[90],"on":[91],"two":[92],"different":[93],"applications,":[95],"micro":[96],"processor":[97],"BIST,":[98],"AES":[100],"BIST.":[101]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-03-10T16:38:18.471706","created_date":"2025-10-10T00:00:00"}
