{"id":"https://openalex.org/W2169517483","doi":"https://doi.org/10.1109/ddecs.2010.5491764","title":"Non-disjoint decomposition of logic functions in Reed-Muller spectral domain","display_name":"Non-disjoint decomposition of logic functions in Reed-Muller spectral domain","publication_year":2010,"publication_date":"2010-04-01","ids":{"openalex":"https://openalex.org/W2169517483","doi":"https://doi.org/10.1109/ddecs.2010.5491764","mag":"2169517483"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2010.5491764","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2010.5491764","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004308441","display_name":"Edward Hrynkiewicz","orcid":null},"institutions":[{"id":"https://openalex.org/I119004910","display_name":"Silesian University of Technology","ror":"https://ror.org/02dyjk442","country_code":"PL","type":"education","lineage":["https://openalex.org/I119004910"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Edward Hrynkiewicz","raw_affiliation_strings":["Institute of Electronics, Silesian University of Technology, Gliwice, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Electronics, Silesian University of Technology, Gliwice, Poland","institution_ids":["https://openalex.org/I119004910"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049376361","display_name":"Stefan Kolodzinski","orcid":"https://orcid.org/0000-0002-8169-8863"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Stefan Kolodzinski","raw_affiliation_strings":["Pratt and Whitney, Kalisz, Poland"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Pratt and Whitney, Kalisz, Poland","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6871,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.73780736,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"3","issue":null,"first_page":"293","last_page":"296"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9891999959945679,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9891999959945679,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9330000281333923,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9203000068664551,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/disjoint-sets","display_name":"Disjoint sets","score":0.7404659986495972},{"id":"https://openalex.org/keywords/functional-decomposition","display_name":"Functional decomposition","score":0.5776402950286865},{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.56414395570755},{"id":"https://openalex.org/keywords/logic-optimization","display_name":"Logic optimization","score":0.540309488773346},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.5163556337356567},{"id":"https://openalex.org/keywords/decomposition","display_name":"Decomposition","score":0.48677515983581543},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4667637050151825},{"id":"https://openalex.org/keywords/function","display_name":"Function (biology)","score":0.44775858521461487},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.41694778203964233},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.41215580701828003},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.40491825342178345},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.39963269233703613},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.37979546189308167},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.32392728328704834}],"concepts":[{"id":"https://openalex.org/C45340560","wikidata":"https://www.wikidata.org/wiki/Q215382","display_name":"Disjoint sets","level":2,"score":0.7404659986495972},{"id":"https://openalex.org/C12145135","wikidata":"https://www.wikidata.org/wiki/Q5215396","display_name":"Functional decomposition","level":2,"score":0.5776402950286865},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.56414395570755},{"id":"https://openalex.org/C28449271","wikidata":"https://www.wikidata.org/wiki/Q6667469","display_name":"Logic optimization","level":4,"score":0.540309488773346},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.5163556337356567},{"id":"https://openalex.org/C124681953","wikidata":"https://www.wikidata.org/wiki/Q339062","display_name":"Decomposition","level":2,"score":0.48677515983581543},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4667637050151825},{"id":"https://openalex.org/C14036430","wikidata":"https://www.wikidata.org/wiki/Q3736076","display_name":"Function (biology)","level":2,"score":0.44775858521461487},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.41694778203964233},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.41215580701828003},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.40491825342178345},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.39963269233703613},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.37979546189308167},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.32392728328704834},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C78458016","wikidata":"https://www.wikidata.org/wiki/Q840400","display_name":"Evolutionary biology","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2010.5491764","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2010.5491764","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8","score":0.5099999904632568}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2069533828","https://openalex.org/W2080498731","https://openalex.org/W2116181020","https://openalex.org/W2140559347","https://openalex.org/W2167506420","https://openalex.org/W2323419649"],"related_works":["https://openalex.org/W1980308745","https://openalex.org/W2078452800","https://openalex.org/W2147890927","https://openalex.org/W2744202010","https://openalex.org/W2122735785","https://openalex.org/W2053477566","https://openalex.org/W2120569261","https://openalex.org/W3143008962","https://openalex.org/W2100921984","https://openalex.org/W1966574477"],"abstract_inverted_index":{"The":[0,24,42,69,98],"paper":[1],"deals":[2],"with":[3,31],"the":[4,11,51,79],"problems":[5],"of":[6,35,44,53,55,62,88,100],"input":[7],"variables":[8,48],"assigning":[9],"to":[10,33],"free":[12],"set":[13,15,18,49],"bounded":[14],"and":[16,26,66],"common":[17,47],"during":[19],"logic":[20,36,89],"function":[21,90],"non-disjoint":[22,56],"decomposition.":[23],"Ashenhurst":[25],"Curtis":[27],"decompositions":[28],"are":[29,82,102],"considered":[30],"respect":[32],"implementation":[34],"functions":[37],"in":[38,74],"LUT":[39],"based":[40,59],"FPGA.":[41],"method":[43],"finding":[45],"profitable":[46],"(from":[50],"point":[52],"view":[54],"decomposition)":[57],"is":[58,71,92],"on":[60],"utilization":[61],"Logic":[63],"Differential":[64],"Calculus":[65],"authors":[67],"experiences.":[68],"decomposition":[70,101],"carried":[72],"out":[73],"Reed-Muller":[75,86,96],"spectral":[76],"domain":[77],"because":[78],"Boolean":[80],"differentials":[81],"easy":[83],"calculated":[84],"from":[85],"form":[87],"which":[91],"obtained":[93],"as":[94],"reverse":[95],"transform.":[97],"results":[99],"very":[103],"promising.":[104]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
