{"id":"https://openalex.org/W2157137864","doi":"https://doi.org/10.1109/ddecs.2009.5012121","title":"MTPP - Modular Traffic Processing Platform","display_name":"MTPP - Modular Traffic Processing Platform","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W2157137864","doi":"https://doi.org/10.1109/ddecs.2009.5012121","mag":"2157137864"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2009.5012121","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2009.5012121","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023095448","display_name":"Ji\u0159\u00ed Hal\u00e1k","orcid":null},"institutions":[{"id":"https://openalex.org/I54634078","display_name":"Czech Education and Scientific Network","ror":"https://ror.org/050dkka69","country_code":"CZ","type":"other","lineage":["https://openalex.org/I54634078"]}],"countries":["CZ"],"is_corresponding":true,"raw_author_name":"Jiri Halak","raw_affiliation_strings":["CESNET"],"affiliations":[{"raw_affiliation_string":"CESNET","institution_ids":["https://openalex.org/I54634078"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051629625","display_name":"Sven Ubik","orcid":"https://orcid.org/0000-0003-2272-6454"},"institutions":[{"id":"https://openalex.org/I54634078","display_name":"Czech Education and Scientific Network","ror":"https://ror.org/050dkka69","country_code":"CZ","type":"other","lineage":["https://openalex.org/I54634078"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Sven Ubik","raw_affiliation_strings":["CESNET","CESNET a.l.e, Czech Republic"],"affiliations":[{"raw_affiliation_string":"CESNET","institution_ids":["https://openalex.org/I54634078"]},{"raw_affiliation_string":"CESNET a.l.e, Czech Republic","institution_ids":["https://openalex.org/I54634078"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5023095448"],"corresponding_institution_ids":["https://openalex.org/I54634078"],"apc_list":null,"apc_paid":null,"fwci":0.3428,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.66192975,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"170","last_page":"173"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.991100013256073,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.991100013256073,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10847","display_name":"Advanced Optical Network Technologies","score":0.9898999929428101,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9891999959945679,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/firmware","display_name":"Firmware","score":0.8983930349349976},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.7278199791908264},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7239209413528442},{"id":"https://openalex.org/keywords/packet-processing","display_name":"Packet processing","score":0.6660512685775757},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6609163284301758},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6235062479972839},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5321974158287048},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4761331379413605},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.4405099153518677},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.43605396151542664},{"id":"https://openalex.org/keywords/isolation","display_name":"Isolation (microbiology)","score":0.4162417948246002},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.39520713686943054},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3434230089187622},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.27100858092308044},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.152311772108078}],"concepts":[{"id":"https://openalex.org/C67212190","wikidata":"https://www.wikidata.org/wiki/Q104851","display_name":"Firmware","level":2,"score":0.8983930349349976},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.7278199791908264},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7239209413528442},{"id":"https://openalex.org/C2779581428","wikidata":"https://www.wikidata.org/wiki/Q7122997","display_name":"Packet processing","level":3,"score":0.6660512685775757},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6609163284301758},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6235062479972839},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5321974158287048},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4761331379413605},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.4405099153518677},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.43605396151542664},{"id":"https://openalex.org/C2775941552","wikidata":"https://www.wikidata.org/wiki/Q25212305","display_name":"Isolation (microbiology)","level":2,"score":0.4162417948246002},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.39520713686943054},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3434230089187622},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.27100858092308044},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.152311772108078},{"id":"https://openalex.org/C89423630","wikidata":"https://www.wikidata.org/wiki/Q7193","display_name":"Microbiology","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C74650414","wikidata":"https://www.wikidata.org/wiki/Q11397","display_name":"Classical mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2009.5012121","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2009.5012121","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4099999964237213,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W49964179","https://openalex.org/W2147039189","https://openalex.org/W4252485253"],"related_works":["https://openalex.org/W2582981600","https://openalex.org/W4389238932","https://openalex.org/W4387467152","https://openalex.org/W4212885212","https://openalex.org/W4379115910","https://openalex.org/W3010413952","https://openalex.org/W2518118925","https://openalex.org/W3159273459","https://openalex.org/W2154462221","https://openalex.org/W1984383372"],"abstract_inverted_index":{"High-speed":[0],"(10":[1],"Gb/s":[2],"and":[3,7,80],"above)":[4],"network":[5],"monitoring":[6],"traffic":[8],"processing":[9,56,69],"requires":[10],"hardware":[11,55],"acceleration.":[12],"Different":[13],"applications":[14],"require":[15],"different":[16],"functions":[17],"to":[18,33,52,76],"be":[19],"placed":[20],"in":[21],"hardware.":[22],"Current":[23],"packet":[24],"capture":[25],"cards":[26],"include":[27],"fixed":[28],"firmware,":[29],"which":[30,48],"is":[31],"difficult":[32],"extend.":[34],"In":[35],"this":[36],"paper":[37],"we":[38],"propose":[39],"an":[40],"architecture":[41],"for":[42],"Modular":[43],"Traffic":[44],"Processing":[45],"Platform":[46],"(MTPP),":[47],"enables":[49],"end":[50],"users":[51],"easily":[53],"modify":[54],"without":[57],"any":[58],"FPGA":[59],"development.":[60],"On":[61],"the":[62],"other":[63],"hand,":[64],"developers":[65],"can":[66],"create":[67],"new":[68],"modules":[70],"with":[71],"much":[72],"reduced":[73],"effort":[74],"thanks":[75],"simple":[77],"module":[78,83],"interfaces":[79],"isolation":[81],"of":[82],"time":[84],"constraints.":[85]},"counts_by_year":[{"year":2015,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}