{"id":"https://openalex.org/W2123439315","doi":"https://doi.org/10.1109/ddecs.2009.5012092","title":"Fast congestion-aware timing-driven placement for island FPGA","display_name":"Fast congestion-aware timing-driven placement for island FPGA","publication_year":2009,"publication_date":"2009-01-01","ids":{"openalex":"https://openalex.org/W2123439315","doi":"https://doi.org/10.1109/ddecs.2009.5012092","mag":"2123439315"},"language":"en","primary_location":{"id":"doi:10.1109/ddecs.2009.5012092","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2009.5012092","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102150392","display_name":"Jinpeng Zhao","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Jinpeng Zhao","raw_affiliation_strings":["EDA Laboratory, Department of Computer Science, Tsinghua University, Beijing, China","EDA Lab, Department of Computer Science, Tsinghua University, Beijing 100084, China"],"affiliations":[{"raw_affiliation_string":"EDA Laboratory, Department of Computer Science, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"EDA Lab, Department of Computer Science, Tsinghua University, Beijing 100084, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102816996","display_name":"Qiang Zhou","orcid":"https://orcid.org/0000-0002-2426-9384"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qiang Zhou","raw_affiliation_strings":["EDA Laboratory, Department of Computer Science, Tsinghua University, Beijing, China","EDA Lab, Department of Computer Science, Tsinghua University, Beijing 100084, China"],"affiliations":[{"raw_affiliation_string":"EDA Laboratory, Department of Computer Science, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"EDA Lab, Department of Computer Science, Tsinghua University, Beijing 100084, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100894724","display_name":"Yici Cai","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yici Cai","raw_affiliation_strings":["EDA Laboratory, Department of Computer Science, Tsinghua University, Beijing, China","EDA Lab, Department of Computer Science, Tsinghua University, Beijing 100084, China"],"affiliations":[{"raw_affiliation_string":"EDA Laboratory, Department of Computer Science, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"EDA Lab, Department of Computer Science, Tsinghua University, Beijing 100084, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5102150392"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.14310382,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"24","last_page":"27"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7731276750564575},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6213333606719971},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.556817352771759},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5289319157600403},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.46069690585136414},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.4511491656303406},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.4370577335357666},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.31898295879364014},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.12565061450004578},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09340685606002808}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7731276750564575},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6213333606719971},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.556817352771759},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5289319157600403},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.46069690585136414},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.4511491656303406},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.4370577335357666},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.31898295879364014},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.12565061450004578},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09340685606002808},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ddecs.2009.5012092","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ddecs.2009.5012092","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 12th International Symposium on Design and Diagnostics of Electronic Circuits &amp; Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1791881893","https://openalex.org/W1980746862","https://openalex.org/W1984283136","https://openalex.org/W2014274413","https://openalex.org/W2091265894","https://openalex.org/W2095117703","https://openalex.org/W2120970098","https://openalex.org/W2139637699","https://openalex.org/W2148750424","https://openalex.org/W2154014710","https://openalex.org/W2156568500","https://openalex.org/W2161355881","https://openalex.org/W2161455936","https://openalex.org/W2162546785","https://openalex.org/W4235818534","https://openalex.org/W4236269389","https://openalex.org/W4251729857","https://openalex.org/W4256464439","https://openalex.org/W6673346836","https://openalex.org/W6682881650","https://openalex.org/W6684055170"],"related_works":["https://openalex.org/W3146360095","https://openalex.org/W2365007040","https://openalex.org/W2184011203","https://openalex.org/W1970519101","https://openalex.org/W4235807419","https://openalex.org/W2045633099","https://openalex.org/W2144633290","https://openalex.org/W1910575119","https://openalex.org/W2550704533","https://openalex.org/W2890026549"],"abstract_inverted_index":{"A":[0],"new":[1],"fast":[2],"timing-driven":[3],"placement":[4],"is":[5,11,29,56,62,98,102],"presented":[6],"in":[7,70,139],"this":[8,27],"paper,":[9],"which":[10],"partitioning-based":[12],"method,":[13,96],"explicitly":[14],"considering":[15],"the":[16,35,59,71,78],"congestion":[17,44,60,144],"for":[18],"island":[19],"style":[20],"FPGAs.":[21],"The":[22,47,91],"most":[23],"distinct":[24],"feature":[25],"of":[26,81,141],"approach":[28],"that":[30],"it":[31,76],"not":[32],"only":[33,121],"reduces":[34],"circuit":[36,87],"critical":[37],"path":[38],"delay":[39],"efficiently,":[40],"but":[41,120],"also":[42,131],"takes":[43],"into":[45],"account.":[46],"harmony":[48],"between":[49],"partitioning":[50],"objective":[51],"and":[52,112,143],"timing":[53,142],"improvement":[54,117],"goal":[55],"kept;":[57],"moreover,":[58],"constraint":[61],"added":[63],"to":[64,67,104,114,127],"cost":[65],"function":[66],"improve":[68],"routability":[69,111],"meantime.":[72],"As":[73],"a":[74],"result,":[75],"avoids":[77],"excessive":[79],"usage":[80],"local":[82],"routing":[83],"resources":[84],"while":[85],"remaining":[86],"performance":[88,119],"much":[89,133],"better.":[90],"experimental":[92],"results":[93,135],"show":[94],"our":[95],"FCTP,":[97],"very":[99],"fast.":[100],"It":[101,130],"able":[103],"produce":[105],"solutions":[106],"with":[107,145],"equal":[108],"or":[109],"better":[110,134],"up":[113],"average":[115,124],"8.19%":[116],"on":[118],"less":[122],"1/3":[123],"runtime":[125,147],"compared":[126],"TVPR":[128],"[1].":[129],"achieves":[132],"than":[136],"PPFF":[137],"[7]":[138],"terms":[140],"negligible":[146],"penalty.":[148]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
