{"id":"https://openalex.org/W4417249097","doi":"https://doi.org/10.1109/dcis67520.2025.11281901","title":"A Lightweight AES Peripheral for RISC-V Cores and IoT Applications","display_name":"A Lightweight AES Peripheral for RISC-V Cores and IoT Applications","publication_year":2025,"publication_date":"2025-11-26","ids":{"openalex":"https://openalex.org/W4417249097","doi":"https://doi.org/10.1109/dcis67520.2025.11281901"},"language":null,"primary_location":{"id":"doi:10.1109/dcis67520.2025.11281901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dcis67520.2025.11281901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 40th Conference on Design of Circuits and Integrated Systems (DCIS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102880955","display_name":"Carlos Fern\u00e1ndez-Garc\u00eda","orcid":"https://orcid.org/0009-0002-9137-9919"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Carlos Fern\u00e1ndez-Garc\u00eda","raw_affiliation_strings":["Instituto de Microelectr&#x00F3;nica de Sevilla (IMSE-CNM), Universidad de Sevilla (US),Sevilla,Espa&#x00F1;a"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr&#x00F3;nica de Sevilla (IMSE-CNM), Universidad de Sevilla (US),Sevilla,Espa&#x00F1;a","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069854086","display_name":"Carmen Baena Oliva","orcid":"https://orcid.org/0000-0002-5162-6017"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Carmen Baena Oliva","raw_affiliation_strings":["Instituto de Microelectr&#x00F3;nica de Sevilla (IMSE-CNM), Universidad de Sevilla (US),Sevilla,Espa&#x00F1;a"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr&#x00F3;nica de Sevilla (IMSE-CNM), Universidad de Sevilla (US),Sevilla,Espa&#x00F1;a","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089048144","display_name":"Pilar Parra Fern\u00e1ndez","orcid":"https://orcid.org/0000-0003-2121-8247"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Pilar Parra Fern\u00e1ndez","raw_affiliation_strings":["Instituto de Microelectr&#x00F3;nica de Sevilla (IMSE-CNM), Universidad de Sevilla (US),Sevilla,Espa&#x00F1;a"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr&#x00F3;nica de Sevilla (IMSE-CNM), Universidad de Sevilla (US),Sevilla,Espa&#x00F1;a","institution_ids":["https://openalex.org/I4210104545"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101935276","display_name":"C. J. Jim\u00e9nez-Fern\u00e1ndez","orcid":"https://orcid.org/0000-0002-5010-337X"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Carlos. J. Jim\u00e9nez-Fern\u00e1ndez","raw_affiliation_strings":["Instituto de Microelectr&#x00F3;nica de Sevilla (IMSE-CNM), Universidad de Sevilla (US),Sevilla,Espa&#x00F1;a"],"affiliations":[{"raw_affiliation_string":"Instituto de Microelectr&#x00F3;nica de Sevilla (IMSE-CNM), Universidad de Sevilla (US),Sevilla,Espa&#x00F1;a","institution_ids":["https://openalex.org/I4210104545"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5102880955"],"corresponding_institution_ids":["https://openalex.org/I4210104545"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.22068408,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"49","last_page":"54"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.984000027179718,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.984000027179718,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.005100000184029341,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.0013000000035390258,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.6437000036239624},{"id":"https://openalex.org/keywords/datapath","display_name":"Datapath","score":0.6309000253677368},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5630000233650208},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5347999930381775},{"id":"https://openalex.org/keywords/advanced-encryption-standard","display_name":"Advanced Encryption Standard","score":0.5069000124931335},{"id":"https://openalex.org/keywords/peripheral","display_name":"Peripheral","score":0.43140000104904175},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.39959999918937683}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7263000011444092},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6995000243186951},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.6437000036239624},{"id":"https://openalex.org/C2781198647","wikidata":"https://www.wikidata.org/wiki/Q1633673","display_name":"Datapath","level":2,"score":0.6309000253677368},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5630000233650208},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5347999930381775},{"id":"https://openalex.org/C94520183","wikidata":"https://www.wikidata.org/wiki/Q190746","display_name":"Advanced Encryption Standard","level":3,"score":0.5069000124931335},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4903999865055084},{"id":"https://openalex.org/C46762472","wikidata":"https://www.wikidata.org/wiki/Q178648","display_name":"Peripheral","level":2,"score":0.43140000104904175},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.39959999918937683},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.37940001487731934},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.35519999265670776},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.31049999594688416},{"id":"https://openalex.org/C81860439","wikidata":"https://www.wikidata.org/wiki/Q251212","display_name":"Internet of Things","level":2,"score":0.2915000021457672},{"id":"https://openalex.org/C46331935","wikidata":"https://www.wikidata.org/wiki/Q4651362","display_name":"AES implementations","level":4,"score":0.28519999980926514},{"id":"https://openalex.org/C79974875","wikidata":"https://www.wikidata.org/wiki/Q483639","display_name":"Cloud computing","level":2,"score":0.2838999927043915},{"id":"https://openalex.org/C2983609787","wikidata":"https://www.wikidata.org/wiki/Q10534782","display_name":"Software implementation","level":3,"score":0.2766000032424927},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.2703000009059906},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.25459998846054077}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dcis67520.2025.11281901","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dcis67520.2025.11281901","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 40th Conference on Design of Circuits and Integrated Systems (DCIS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1541098965","https://openalex.org/W2079983098","https://openalex.org/W2289218694","https://openalex.org/W2512400886","https://openalex.org/W2973602519","https://openalex.org/W3026597355","https://openalex.org/W4231528401"],"related_works":[],"abstract_inverted_index":{"In":[0],"this":[1],"article,":[2],"we":[3],"present":[4],"a":[5,20,40,49,52,70,77,82,106,116],"lightweight":[6],"peripheral":[7,23,28,59,104],"of":[8,36,64,73,92],"the":[9,44,88,93,100,103,112,120,125],"Advanced":[10],"Encryption":[11],"Standard":[12],"(AES)":[13],"algorithm":[14],"suitable":[15],"for":[16],"its":[17],"implementation":[18,35,72,79],"as":[19],"memory":[21],"mapped":[22],"in":[24,43,55,62],"RISC-V":[25,126],"cores.":[26],"The":[27,58,96],"is":[29,60],"based":[30],"on":[31],"an":[32],"8-bit":[33],"serial":[34],"AES,":[37,74],"which":[38],"achieves":[39,105],"drastic":[41],"reduction":[42],"time":[45],"required":[46],"to":[47,123],"encrypt":[48],"message":[50],"with":[51,69,115],"reduced":[53],"increase":[54,118],"resource":[56,65],"consumption.":[57],"compared":[61],"terms":[63],"utilization":[66],"and":[67,76],"timing":[68],"software":[71,113],"tinyAES-c,":[75],"hardware":[78],"that":[80,99],"employs":[81],"more":[83],"common":[84],"128-bit":[85],"datapath":[86],"using":[87,102],"Series-7":[89],"FPGA":[90],"technology":[91],"manufacturer":[94],"AMD-Xilinx.":[95],"results":[97],"show":[98],"system":[101],"speed":[107],"71.84":[108],"times":[109],"faster":[110],"than":[111],"implementation,":[114],"46.37%":[117],"over":[119],"logic":[121],"used":[122],"implement":[124],"processor.":[127]},"counts_by_year":[],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-12-11T00:00:00"}
