{"id":"https://openalex.org/W4404953871","doi":"https://doi.org/10.1109/dcis62603.2024.10769177","title":"Hardware coprocessor integration with NEORV32: characterization for efficient implementation of RISC-V-based AI SoCs","display_name":"Hardware coprocessor integration with NEORV32: characterization for efficient implementation of RISC-V-based AI SoCs","publication_year":2024,"publication_date":"2024-11-13","ids":{"openalex":"https://openalex.org/W4404953871","doi":"https://doi.org/10.1109/dcis62603.2024.10769177"},"language":"en","primary_location":{"id":"doi:10.1109/dcis62603.2024.10769177","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dcis62603.2024.10769177","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 39th Conference on Design of Circuits and Integrated Systems (DCIS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5114971586","display_name":"Unai Sainz-Estebanez","orcid":null},"institutions":[{"id":"https://openalex.org/I169108374","display_name":"University of the Basque Country","ror":"https://ror.org/000xsnr85","country_code":"ES","type":"education","lineage":["https://openalex.org/I169108374"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Unai Sainz-Estebanez","raw_affiliation_strings":["University of the Basque Country (UPV/EHU),Grupo de Dise&#x00F1;o en Electr&#x00F3;nica Digital (GDED),Bilbao,Basque Country,Spain"],"affiliations":[{"raw_affiliation_string":"University of the Basque Country (UPV/EHU),Grupo de Dise&#x00F1;o en Electr&#x00F3;nica Digital (GDED),Bilbao,Basque Country,Spain","institution_ids":["https://openalex.org/I169108374"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085064790","display_name":"Unai Martinez-Corral","orcid":"https://orcid.org/0000-0003-1752-9181"},"institutions":[{"id":"https://openalex.org/I169108374","display_name":"University of the Basque Country","ror":"https://ror.org/000xsnr85","country_code":"ES","type":"education","lineage":["https://openalex.org/I169108374"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Unai Martinez-Corral","raw_affiliation_strings":["University of the Basque Country (UPV/EHU),Dept. Electronics Technology,Bilbao,Basque Country,Spain"],"affiliations":[{"raw_affiliation_string":"University of the Basque Country (UPV/EHU),Dept. Electronics Technology,Bilbao,Basque Country,Spain","institution_ids":["https://openalex.org/I169108374"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010198168","display_name":"Koldo Basterretxea","orcid":"https://orcid.org/0000-0002-5934-4735"},"institutions":[{"id":"https://openalex.org/I169108374","display_name":"University of the Basque Country","ror":"https://ror.org/000xsnr85","country_code":"ES","type":"education","lineage":["https://openalex.org/I169108374"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Koldo Basterretxea","raw_affiliation_strings":["University of the Basque Country (UPV/EHU),Dept. Electronics Technology,Bilbao,Basque Country,Spain"],"affiliations":[{"raw_affiliation_string":"University of the Basque Country (UPV/EHU),Dept. Electronics Technology,Bilbao,Basque Country,Spain","institution_ids":["https://openalex.org/I169108374"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5114971586"],"corresponding_institution_ids":["https://openalex.org/I169108374"],"apc_list":null,"apc_paid":null,"fwci":0.5198,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.67292225,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.973800003528595,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.973800003528595,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9663000106811523,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.902999997138977,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.910783052444458},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6668441295623779},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.6209161877632141},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.593458354473114},{"id":"https://openalex.org/keywords/characterization","display_name":"Characterization (materials science)","score":0.49243029952049255},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4180341362953186},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4132688045501709},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32436394691467285},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.2764672636985779}],"concepts":[{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.910783052444458},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6668441295623779},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.6209161877632141},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.593458354473114},{"id":"https://openalex.org/C2780841128","wikidata":"https://www.wikidata.org/wiki/Q5073781","display_name":"Characterization (materials science)","level":2,"score":0.49243029952049255},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4180341362953186},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4132688045501709},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32436394691467285},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.2764672636985779},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dcis62603.2024.10769177","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dcis62603.2024.10769177","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 39th Conference on Design of Circuits and Integrated Systems (DCIS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W2415551696","https://openalex.org/W4312588618","https://openalex.org/W4312910656","https://openalex.org/W4377295722"],"related_works":["https://openalex.org/W2132643331","https://openalex.org/W4383066258","https://openalex.org/W4320058182","https://openalex.org/W2377395201","https://openalex.org/W1557455719","https://openalex.org/W4310502103","https://openalex.org/W2155883469","https://openalex.org/W2035206467","https://openalex.org/W4401155055","https://openalex.org/W4404025728"],"abstract_inverted_index":{"Performing":[0],"AI":[1,36,132],"inference":[2],"ubiquitously":[3],"requires":[4],"energy-efficient,":[5],"small":[6],"footprint":[7],"and":[8,31,74,109],"highly":[9],"reliable":[10],"processing":[11,14],"devices.":[12],"Heterogeneous":[13],"architectures":[15],"combining":[16],"customized":[17],"CPUs":[18],"with":[19],"domain":[20],"specific":[21],"coprocessors":[22],"can":[23],"provide":[24],"a":[25,68,95],"good":[26],"trade-off":[27],"between":[28],"computational":[29],"efficiency":[30],"application":[32],"flexibility":[33],"for":[34,52,123,130],"edge":[35],"deployments":[37],"while":[38],"shortening":[39],"development":[40,126],"times":[41],"compared":[42],"to":[43,85,111],"full":[44],"custom":[45],"application-specific":[46],"processor":[47],"designs.":[48],"Following":[49],"the":[50,53,57,65,87,119,124,134],"impulse":[51],"European":[54],"sovereignty":[55],"in":[56,60,94],"microelectronics":[58],"field,":[59],"this":[61],"work":[62],"we":[63],"propose":[64],"use":[66],"of":[67,89,127],"RISCV":[69],"based":[70],"open-source":[71],"hardware":[72],"platform":[73],"Free/Libre":[75],"and/or":[76],"Open":[77],"Source":[78],"(FLOS)":[79],"Electronic":[80],"Design":[81],"Automation":[82],"(EDA)":[83],"tools":[84],"evaluate":[86],"performance":[88],"different":[90],"coprocessor":[91],"integration":[92,104],"options":[93,105],"System-on-Chip":[96],"(SoC)":[97],"prototyped":[98],"on":[99],"FPGA.":[100],"We":[101],"tested":[102],"four":[103],"(XBUS,":[106],"Stream,":[107],"CFS":[108],"CFU)":[110],"obtain":[112],"precise":[113],"data":[114],"that":[115],"will":[116],"allow":[117],"making":[118],"correct":[120],"design":[121],"decisions":[122],"future":[125],"integrated":[128],"devices":[129],"high-performance":[131],"at":[133],"edge.":[135]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-12-27T23:08:20.325037","created_date":"2025-10-10T00:00:00"}
