{"id":"https://openalex.org/W4404953270","doi":"https://doi.org/10.1109/dcis62603.2024.10769123","title":"BiDSRS: Resource Efficient Real Time Bidirectional Super Resolution System for FPGAs","display_name":"BiDSRS: Resource Efficient Real Time Bidirectional Super Resolution System for FPGAs","publication_year":2024,"publication_date":"2024-11-13","ids":{"openalex":"https://openalex.org/W4404953270","doi":"https://doi.org/10.1109/dcis62603.2024.10769123"},"language":"en","primary_location":{"id":"doi:10.1109/dcis62603.2024.10769123","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dcis62603.2024.10769123","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 39th Conference on Design of Circuits and Integrated Systems (DCIS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061008457","display_name":"Rashed Al Amin","orcid":"https://orcid.org/0000-0001-7237-6240"},"institutions":[{"id":"https://openalex.org/I206895457","display_name":"University of Siegen","ror":"https://ror.org/02azyry73","country_code":"DE","type":"education","lineage":["https://openalex.org/I206895457"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Rashed Al Amin","raw_affiliation_strings":["University of Siegen,Institute for Embedded Systems,Siegen,Germany"],"affiliations":[{"raw_affiliation_string":"University of Siegen,Institute for Embedded Systems,Siegen,Germany","institution_ids":["https://openalex.org/I206895457"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084195691","display_name":"Roman Obermaisser","orcid":null},"institutions":[{"id":"https://openalex.org/I206895457","display_name":"University of Siegen","ror":"https://ror.org/02azyry73","country_code":"DE","type":"education","lineage":["https://openalex.org/I206895457"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Roman Obermaisser","raw_affiliation_strings":["University of Siegen,Institute for Embedded Systems,Siegen,Germany"],"affiliations":[{"raw_affiliation_string":"University of Siegen,Institute for Embedded Systems,Siegen,Germany","institution_ids":["https://openalex.org/I206895457"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5061008457"],"corresponding_institution_ids":["https://openalex.org/I206895457"],"apc_list":null,"apc_paid":null,"fwci":1.6148,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.84204803,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11105","display_name":"Advanced Image Processing Techniques","score":0.9921000003814697,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13114","display_name":"Image Processing Techniques and Applications","score":0.9717000126838684,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8345193862915039},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7232879400253296},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.5225971937179565},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46474167704582214},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.36891356110572815},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3524063527584076},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.07617858052253723}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8345193862915039},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7232879400253296},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.5225971937179565},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46474167704582214},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.36891356110572815},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3524063527584076},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.07617858052253723}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/dcis62603.2024.10769123","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dcis62603.2024.10769123","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 39th Conference on Design of Circuits and Integrated Systems (DCIS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.44999998807907104,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W2067042811","https://openalex.org/W2157494358","https://openalex.org/W2476548250","https://openalex.org/W2753090066","https://openalex.org/W2804744229","https://openalex.org/W2886623847","https://openalex.org/W2887695188","https://openalex.org/W2923834406","https://openalex.org/W2986445670","https://openalex.org/W3080716055","https://openalex.org/W3103528255","https://openalex.org/W3163159351","https://openalex.org/W4321488033","https://openalex.org/W4385831778","https://openalex.org/W4391611240","https://openalex.org/W4398249887","https://openalex.org/W4405271226","https://openalex.org/W4405272042","https://openalex.org/W4405490465"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2355315220","https://openalex.org/W4200391368","https://openalex.org/W2096844293","https://openalex.org/W2363944576","https://openalex.org/W2351041855","https://openalex.org/W2570254841","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506"],"abstract_inverted_index":{"The":[0],"burgeoning":[1],"field":[2],"of":[3,15,137,157,177,189,203,209],"computer":[4],"vision":[5],"applications":[6],"and":[7,25,46,81,135,162,194,229],"visual":[8],"display":[9],"devices":[10,73],"has":[11],"propelled":[12],"the":[13,51,144],"exploration":[14],"super":[16],"resolution":[17],"(SR)":[18],"techniques,":[19],"drawing":[20],"attention":[21],"from":[22],"both":[23,130],"academia":[24],"industry.":[26],"Field":[27],"programmable":[28],"gate":[29],"arrays":[30],"(FPGAs)":[31],"have":[32],"emerged":[33],"as":[34],"a":[35,76,100,110,119,155,174,200,206],"favored":[36],"platform":[37],"for":[38,53,79,116,133,221,227],"implementing":[39],"intricate":[40],"algorithms,":[41],"given":[42],"their":[43,64],"energy":[44,80],"efficiency":[45],"parallel":[47],"computing":[48,231],"capabilities.":[49],"However,":[50],"demand":[52],"real-time":[54,112],"SR":[55,83,87,113,170,184,223],"systems":[56],"employing":[57],"deep":[58],"learning":[59],"poses":[60],"challenges":[61],"due":[62],"to":[63,167,181],"resource-intensive":[65],"nature,":[66],"particularly":[67],"when":[68],"targeting":[69],"edge":[70],"or":[71,94,97,139],"resource-constrained":[72],"which":[74],"creates":[75],"pressing":[77],"need":[78],"resource-efficient":[82,111],"solutions.":[84],"Besides,":[85],"conventional":[86],"methods":[88],"predominantly":[89],"focus":[90],"only":[91],"on":[92,143],"upscaling":[93,134],"downscaling":[95,136],"images":[96,138],"videos":[98],"within":[99],"system.":[101],"To":[102],"bridge":[103],"this":[104,106],"gap,":[105],"paper":[107],"proposes":[108],"BiDSRS,":[109],"system":[114],"tailored":[115],"FPGAs,":[117],"utilizing":[118],"modified":[120],"bicubic":[121],"interpolation":[122],"method.":[123],"In":[124],"addition,":[125],"BiDSRS":[126,186,215],"facilitates":[127],"scaling":[128],"in":[129],"directions,":[131],"allowing":[132],"videos.":[140],"Evaluation":[141],"conducted":[142],"Xilinx":[145],"ZCU":[146],"102":[147],"FPGA":[148,218],"board":[149],"demonstrates":[150],"significant":[151],"resource":[152,219],"savings,":[153],"achieving":[154],"reduction":[156],"46x":[158],"LUT,":[159,191],"31x":[160],"BRAM,":[161,193],"41x":[163],"DSP":[164,196],"utilization":[165,220],"compared":[166,180],"state-of-the-art":[168],"DNN-based":[169],"systems,":[171,185],"albeit":[172,198],"with":[173,199],"throughput":[175,201,208],"trade-off":[176,202],"0.25x.":[178],"Similarly,":[179],"leading":[182],"algorithm-based":[183],"achieves":[187],"savings":[188],"23x":[190],"5x":[192],"4x":[195],"resources,":[197],"0.5x.":[204],"Despite":[205],"reduced":[207],"4K@30":[210],"Frame":[211],"Per":[212],"Second":[213],"(FPS),":[214],"substantially":[216],"decreases":[217],"video":[222],"tasks,":[224],"offering":[225],"support":[226],"sustainable":[228],"energy-efficient":[230],"systems.":[232]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2}],"updated_date":"2025-12-19T19:40:27.379048","created_date":"2025-10-10T00:00:00"}