{"id":"https://openalex.org/W4389544499","doi":"https://doi.org/10.1109/dcis58620.2023.10335992","title":"UML-Based Design Flow for Systems with Neural Networks","display_name":"UML-Based Design Flow for Systems with Neural Networks","publication_year":2023,"publication_date":"2023-11-15","ids":{"openalex":"https://openalex.org/W4389544499","doi":"https://doi.org/10.1109/dcis58620.2023.10335992"},"language":"en","primary_location":{"id":"doi:10.1109/dcis58620.2023.10335992","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dcis58620.2023.10335992","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 38th Conference on Design of Circuits and Integrated Systems (DCIS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://repositorio.unican.es/xmlui/bitstream/10902/32439/2/UML_Based_Design.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100620454","display_name":"Daniel Su\u00e1rez","orcid":"https://orcid.org/0000-0003-3417-1169"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Daniel Su\u00e1rez","raw_affiliation_strings":["Universidad de Cantabria,Microelectronics Engineering Group,Santander,Spain","Microelectronics Engineering Group, Universidad de Cantabria, Santander, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad de Cantabria,Microelectronics Engineering Group,Santander,Spain","institution_ids":["https://openalex.org/I13134134"]},{"raw_affiliation_string":"Microelectronics Engineering Group, Universidad de Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077809133","display_name":"H\u00e9ctor Posadas","orcid":"https://orcid.org/0000-0002-1427-7524"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"H\u00e9ctor Posadas","raw_affiliation_strings":["Universidad de Cantabria,Microelectronics Engineering Group,Santander,Spain","Microelectronics Engineering Group, Universidad de Cantabria, Santander, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad de Cantabria,Microelectronics Engineering Group,Santander,Spain","institution_ids":["https://openalex.org/I13134134"]},{"raw_affiliation_string":"Microelectronics Engineering Group, Universidad de Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025138641","display_name":"V\u00edctor Fern\u00e1ndez","orcid":"https://orcid.org/0000-0003-0614-151X"},"institutions":[{"id":"https://openalex.org/I13134134","display_name":"Universidad de Cantabria","ror":"https://ror.org/046ffzj20","country_code":"ES","type":"education","lineage":["https://openalex.org/I13134134"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"V\u00edctor Fern\u00e1ndez","raw_affiliation_strings":["Universidad de Cantabria,Microelectronics Engineering Group,Santander,Spain","Microelectronics Engineering Group, Universidad de Cantabria, Santander, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad de Cantabria,Microelectronics Engineering Group,Santander,Spain","institution_ids":["https://openalex.org/I13134134"]},{"raw_affiliation_string":"Microelectronics Engineering Group, Universidad de Cantabria, Santander, Spain","institution_ids":["https://openalex.org/I13134134"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I13134134"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":true,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11159","display_name":"Manufacturing Process and Optimization","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2209","display_name":"Industrial and Manufacturing Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11450","display_name":"Model-Driven Software Engineering Techniques","score":0.9696000218391418,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10260","display_name":"Software Engineering Research","score":0.9621000289916992,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7689611315727234},{"id":"https://openalex.org/keywords/unified-modeling-language","display_name":"Unified Modeling Language","score":0.744442343711853},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.522503674030304},{"id":"https://openalex.org/keywords/flow","display_name":"Flow (mathematics)","score":0.44075390696525574},{"id":"https://openalex.org/keywords/applications-of-uml","display_name":"Applications of UML","score":0.4191403388977051},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.35358840227127075},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2633543908596039},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2525537610054016},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.08721932768821716}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7689611315727234},{"id":"https://openalex.org/C145644426","wikidata":"https://www.wikidata.org/wiki/Q169411","display_name":"Unified Modeling Language","level":3,"score":0.744442343711853},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.522503674030304},{"id":"https://openalex.org/C38349280","wikidata":"https://www.wikidata.org/wiki/Q1434290","display_name":"Flow (mathematics)","level":2,"score":0.44075390696525574},{"id":"https://openalex.org/C41298492","wikidata":"https://www.wikidata.org/wiki/Q4781506","display_name":"Applications of UML","level":4,"score":0.4191403388977051},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.35358840227127075},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2633543908596039},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2525537610054016},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.08721932768821716},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/dcis58620.2023.10335992","is_oa":false,"landing_page_url":"https://doi.org/10.1109/dcis58620.2023.10335992","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 38th Conference on Design of Circuits and Integrated Systems (DCIS)","raw_type":"proceedings-article"},{"id":"pmh:oai:repositorio.unican.es:10902/32439","is_oa":true,"landing_page_url":"https://hdl.handle.net/10902/32439","pdf_url":"https://repositorio.unican.es/xmlui/bitstream/10902/32439/2/UML_Based_Design.pdf","source":{"id":"https://openalex.org/S4306400398","display_name":"UCrea (University of Cantabria)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I13134134","host_organization_name":"Universidad de Cantabria","host_organization_lineage":["https://openalex.org/I13134134"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"38th Conference on Design of Circuits and Integrated Systems (DCIS), M\u00e1laga, Spain, 112-117","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:repositorio.unican.es:10902/32439","is_oa":true,"landing_page_url":"https://hdl.handle.net/10902/32439","pdf_url":"https://repositorio.unican.es/xmlui/bitstream/10902/32439/2/UML_Based_Design.pdf","source":{"id":"https://openalex.org/S4306400398","display_name":"UCrea (University of Cantabria)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I13134134","host_organization_name":"Universidad de Cantabria","host_organization_lineage":["https://openalex.org/I13134134"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"38th Conference on Design of Circuits and Integrated Systems (DCIS), M\u00e1laga, Spain, 112-117","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3890911484","display_name":"Distributed Artificial Intelligent Systems","funder_award_id":"101007273","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"},{"id":"https://openalex.org/G6877447997","display_name":null,"funder_award_id":"101007273","funder_id":"https://openalex.org/F4320319005","funder_display_name":"Key Digital Technologies Joint Undertaking"}],"funders":[{"id":"https://openalex.org/F4320319005","display_name":"Key Digital Technologies Joint Undertaking","ror":null},{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4389544499.pdf","grobid_xml":"https://content.openalex.org/works/W4389544499.grobid-xml"},"referenced_works_count":17,"referenced_works":["https://openalex.org/W2030789656","https://openalex.org/W2078209202","https://openalex.org/W2616318524","https://openalex.org/W2769693685","https://openalex.org/W2807162967","https://openalex.org/W3003453708","https://openalex.org/W3061070527","https://openalex.org/W3111383778","https://openalex.org/W3114681415","https://openalex.org/W3134198949","https://openalex.org/W4200032511","https://openalex.org/W4200195825","https://openalex.org/W4200463699","https://openalex.org/W4281566918","https://openalex.org/W4312814739","https://openalex.org/W4313484751","https://openalex.org/W4318576824"],"related_works":["https://openalex.org/W2083641877","https://openalex.org/W2387087283","https://openalex.org/W2368891820","https://openalex.org/W207211690","https://openalex.org/W4256577339","https://openalex.org/W3119629122","https://openalex.org/W1971046215","https://openalex.org/W2162768729","https://openalex.org/W1553991707","https://openalex.org/W2073951592"],"abstract_inverted_index":{"Artificial":[0],"intelligence":[1],"has":[2,22],"demonstrated":[3],"its":[4,33],"ability":[5],"to":[6,25,87,107],"solve":[7,56],"lots":[8],"of":[9,16,40,85],"critical":[10],"tasks,":[11],"but":[12],"at":[13],"the":[14,38,41,103,109,114],"cost":[15],"high":[17],"computational":[18,28],"requirements.":[19],"Different":[20],"hardware":[21],"been":[23],"proposed":[24],"provide":[26],"this":[27,58],"power,":[29],"each":[30],"one":[31],"with":[32,113],"benefits":[34],"and":[35,71,75,90,126,129,135],"drawbacks.":[36],"However,":[37],"exploration":[39,121],"different":[42],"alternatives":[43],"in":[44],"an":[45,47],"easy":[46],"integrated":[48],"way":[49],"is":[50],"still":[51],"a":[52,61],"complex":[53],"task.":[54],"To":[55],"so,":[57],"paper":[59],"proposes":[60],"UML-based":[62],"design":[63],"flow":[64],"where":[65],"neural":[66],"networks":[67],"are":[68],"initially":[69],"specified":[70],"then":[72],"automatically":[73],"generated":[74],"trained":[76],"using":[77,92],"TensorFlow.":[78],"The":[79,99],"approach":[80,118],"also":[81,101],"enables":[82],"automatic":[83],"mapping":[84],"models":[86],"CPU,":[88],"GPU":[89],"FPGAs,":[91],"Xilinx\u2019s":[93],"Deep":[94],"Learning":[95],"Processor":[96],"Units":[97],"(DPUs).":[98],"framework":[100],"generates":[102],"communication":[104],"codes":[105],"required":[106],"connect":[108],"other":[110],"system":[111,123],"components":[112],"implementation":[115,128],"selected.":[116],"This":[117],"addresses":[119],"design-space":[120],"challenges,":[122],"architecture":[124],"definition,":[125],"improves":[127],"training":[130],"processes":[131],"by":[132],"saving":[133],"time":[134],"effort.":[136]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-20T07:56:41.581041","created_date":"2025-10-10T00:00:00"}
