{"id":"https://openalex.org/W4235437924","doi":"https://doi.org/10.1109/date.2012.6176727","title":"On effective flip-chip routing via pseudo single redistribution layer","display_name":"On effective flip-chip routing via pseudo single redistribution layer","publication_year":2012,"publication_date":"2012-03-01","ids":{"openalex":"https://openalex.org/W4235437924","doi":"https://doi.org/10.1109/date.2012.6176727"},"language":"en","primary_location":{"id":"doi:10.1109/date.2012.6176727","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176727","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110868229","display_name":"Hsin-Wu Hsu","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Hsin-Wu Hsu","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103066680","display_name":"Mengling Chen","orcid":"https://orcid.org/0000-0002-1004-7270"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Meng-Ling Chen","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021615416","display_name":"Hung-Ming Chen","orcid":"https://orcid.org/0000-0001-8173-3131"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hung-Ming Chen","raw_affiliation_strings":["Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electronics Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072173302","display_name":"Hung-Chun Li","orcid":null},"institutions":[{"id":"https://openalex.org/I4210086231","display_name":"Global Unichip (Taiwan)","ror":"https://ror.org/00005jn19","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210086231"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hung-Chun Li","raw_affiliation_strings":["Global Unichip Corp., Taiwan"],"affiliations":[{"raw_affiliation_string":"Global Unichip Corp., Taiwan","institution_ids":["https://openalex.org/I4210086231"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5055000437","display_name":"Shihao Chen","orcid":"https://orcid.org/0000-0001-7646-8003"},"institutions":[{"id":"https://openalex.org/I4210086231","display_name":"Global Unichip (Taiwan)","ror":"https://ror.org/00005jn19","country_code":"TW","type":"company","lineage":["https://openalex.org/I4210086231"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shi-Hao Chen","raw_affiliation_strings":["Global Unichip Corp., Taiwan"],"affiliations":[{"raw_affiliation_string":"Global Unichip Corp., Taiwan","institution_ids":["https://openalex.org/I4210086231"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5110868229"],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":0.2455,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.65335082,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1597","last_page":"1602"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6275796890258789},{"id":"https://openalex.org/keywords/static-routing","display_name":"Static routing","score":0.5666778683662415},{"id":"https://openalex.org/keywords/multipath-routing","display_name":"Multipath routing","score":0.5498839616775513},{"id":"https://openalex.org/keywords/link-state-routing-protocol","display_name":"Link-state routing protocol","score":0.5079639554023743},{"id":"https://openalex.org/keywords/equal-cost-multi-path-routing","display_name":"Equal-cost multi-path routing","score":0.5007505416870117},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.48747706413269043},{"id":"https://openalex.org/keywords/policy-based-routing","display_name":"Policy-based routing","score":0.47191742062568665},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4448857605457306},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.4119321405887604},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3357350826263428},{"id":"https://openalex.org/keywords/routing-protocol","display_name":"Routing protocol","score":0.185777485370636}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6275796890258789},{"id":"https://openalex.org/C204948658","wikidata":"https://www.wikidata.org/wiki/Q1119410","display_name":"Static routing","level":4,"score":0.5666778683662415},{"id":"https://openalex.org/C76522221","wikidata":"https://www.wikidata.org/wiki/Q5035396","display_name":"Multipath routing","level":5,"score":0.5498839616775513},{"id":"https://openalex.org/C89305328","wikidata":"https://www.wikidata.org/wiki/Q1755411","display_name":"Link-state routing protocol","level":4,"score":0.5079639554023743},{"id":"https://openalex.org/C115443555","wikidata":"https://www.wikidata.org/wiki/Q5367790","display_name":"Equal-cost multi-path routing","level":5,"score":0.5007505416870117},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.48747706413269043},{"id":"https://openalex.org/C196423136","wikidata":"https://www.wikidata.org/wiki/Q7209671","display_name":"Policy-based routing","level":5,"score":0.47191742062568665},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4448857605457306},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.4119321405887604},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3357350826263428},{"id":"https://openalex.org/C104954878","wikidata":"https://www.wikidata.org/wiki/Q1648707","display_name":"Routing protocol","level":3,"score":0.185777485370636}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2012.6176727","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176727","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation &amp; Test in Europe Conference &amp; Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4300000071525574,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1985647466","https://openalex.org/W2098488748","https://openalex.org/W2113046208","https://openalex.org/W2144672268","https://openalex.org/W2147776496","https://openalex.org/W2149534902","https://openalex.org/W2533479133","https://openalex.org/W4231339740","https://openalex.org/W4244790824","https://openalex.org/W4255799376","https://openalex.org/W6678114595"],"related_works":["https://openalex.org/W3127002380","https://openalex.org/W1997091564","https://openalex.org/W2152381136","https://openalex.org/W2181601090","https://openalex.org/W2001312276","https://openalex.org/W2102655743","https://openalex.org/W4253436398","https://openalex.org/W2351097701","https://openalex.org/W2607223747","https://openalex.org/W2369989480"],"abstract_inverted_index":{"Due":[0],"to":[1,103],"the":[2,34,68,85,91,107,116,127,131,139,152],"advantage":[3],"of":[4,63,87,109,121],"flip-chip":[5],"design":[6,17],"in":[7,15,66],"power":[8],"distribution":[9],"but":[10,65],"controversial":[11],"peripheral":[12],"IO":[13],"placement":[14],"lower":[16],"cost,":[18],"redistribution":[19],"layer":[20,48],"(RDL)":[21],"is":[22,30,38,72,118],"usually":[23],"used":[24],"for":[25,36,50,93],"such":[26],"interconnection.":[27],"Sometimes":[28],"RDL":[29,157],"so":[31],"congested":[32],"that":[33,59],"capacity":[35],"routing":[37,57,70,94,111,122,158],"insufficient.":[39],"Routing":[40],"therefore":[41],"cannot":[42],"be":[43,113],"completed":[44],"within":[45],"a":[46,56,73,142],"single":[47],"even":[49],"manual":[51,125,150],"routing.":[52],"Although":[53],"[2]":[54],"proposed":[55,132,153],"algorithm":[58],"uses":[60],"two":[61],"layers":[62],"RDLs,":[64],"practice":[67],"required":[69,148],"area":[71,108],"little":[74],"more":[75],"than":[76],"one":[77],"layer.":[78],"We":[79,136],"overcome":[80],"this":[81],"problem":[82],"by":[83],"adopting":[84],"concept":[86],"pseudo":[88],"single-layer.":[89],"With":[90],"heuristics":[92],"on":[95,100,141],"mapped":[96],"channels":[97],"and":[98,115,130,160],"observations":[99],"staggered":[101],"pins":[102],"relieve":[104],"vertical":[105],"constraints,":[106],"2-layer":[110],"can":[112,155],"minimized":[114],"routability":[117],"100%.":[119],"Comparisons":[120],"results":[123],"between":[124],"design,":[126,151],"commercial":[128],"tool,":[129],"method":[133,154],"are":[134],"presented.":[135],"have":[137],"shown":[138],"effectiveness":[140],"real":[143],"industrial":[144],"case:":[145],"it":[146],"originally":[147],"fully":[149],"finish":[156],"automatically":[159],"effectively.":[161]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
