{"id":"https://openalex.org/W3149231069","doi":"https://doi.org/10.1109/date.2012.6176709","title":"A fast, source-synchronous ring-based network-on-chip design","display_name":"A fast, source-synchronous ring-based network-on-chip design","publication_year":2012,"publication_date":"2012-03-01","ids":{"openalex":"https://openalex.org/W3149231069","doi":"https://doi.org/10.1109/date.2012.6176709","mag":"3149231069"},"language":"en","primary_location":{"id":"doi:10.1109/date.2012.6176709","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176709","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048542275","display_name":"Anindita Mandal","orcid":"https://orcid.org/0000-0002-9725-9240"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Mandal","raw_affiliation_strings":["Department of CSE, Texas A&M University, College Station, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of CSE, Texas A&M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021685706","display_name":"Sunil P. Khatri","orcid":"https://orcid.org/0000-0001-7134-9929"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. P. Khatri","raw_affiliation_strings":["Department of ECE, Texas A&M University, College Station, TX"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of ECE, Texas A&M University, College Station, TX","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076611650","display_name":"Rajarshi Mahapatra","orcid":"https://orcid.org/0000-0003-0155-0218"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R. N. Mahapatra","raw_affiliation_strings":["Department of CSE, Texas A&M University, College Station, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of CSE, Texas A&M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3726,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.70900622,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1489","last_page":"1494"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10179","display_name":"Supercapacitor Materials and Fabrication","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9916999936103821,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7279563546180725},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.6818707585334778},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.6599410772323608},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5574178695678711},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5288083553314209},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4661482572555542},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.44741761684417725},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4315011501312256},{"id":"https://openalex.org/keywords/power-network-design","display_name":"Power network design","score":0.41697654128074646},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.4104894995689392},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38191765546798706},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37619513273239136},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32244452834129333},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.21431958675384521},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0736798346042633}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7279563546180725},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.6818707585334778},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.6599410772323608},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5574178695678711},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5288083553314209},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4661482572555542},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.44741761684417725},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4315011501312256},{"id":"https://openalex.org/C164565468","wikidata":"https://www.wikidata.org/wiki/Q7236535","display_name":"Power network design","level":3,"score":0.41697654128074646},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.4104894995689392},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38191765546798706},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37619513273239136},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32244452834129333},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.21431958675384521},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0736798346042633}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2012.6176709","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176709","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W59306220","https://openalex.org/W1544623790","https://openalex.org/W1571966117","https://openalex.org/W1982756800","https://openalex.org/W1984520032","https://openalex.org/W2029990606","https://openalex.org/W2042876290","https://openalex.org/W2043688700","https://openalex.org/W2048789167","https://openalex.org/W2066162922","https://openalex.org/W2093545354","https://openalex.org/W2111927499","https://openalex.org/W2113338652","https://openalex.org/W2122724421","https://openalex.org/W2123184444","https://openalex.org/W2140137324","https://openalex.org/W2141184219","https://openalex.org/W2147471190","https://openalex.org/W2155874470","https://openalex.org/W2157488385","https://openalex.org/W2170639273","https://openalex.org/W3139923448","https://openalex.org/W3144430200","https://openalex.org/W3144514467","https://openalex.org/W3169463464","https://openalex.org/W4231114788","https://openalex.org/W4254596596","https://openalex.org/W6676231733"],"related_works":["https://openalex.org/W2135981148","https://openalex.org/W2388672758","https://openalex.org/W2754086592","https://openalex.org/W2144357574","https://openalex.org/W2519428907","https://openalex.org/W1966325333","https://openalex.org/W2065289416","https://openalex.org/W2108200233","https://openalex.org/W4230458348","https://openalex.org/W3198758847"],"abstract_inverted_index":{"Most":[0],"network-on-chip":[1],"(NoC)":[2],"architectures":[3],"are":[4,49],"based":[5,86],"on":[6,22],"a":[7,16,28,38,76,91],"mesh-based":[8],"interconnection":[9],"structure.":[10],"In":[11],"this":[12],"paper,":[13],"we":[14],"present":[15],"new":[17],"NoC":[18],"architecture,":[19],"which":[20,41],"relies":[21],"source":[23,31],"synchronous":[24,32],"data":[25,34],"transfer":[26],"over":[27],"ring.":[29,53],"The":[30],"ring":[33],"is":[35],"clocked":[36],"by":[37,51],"resonant":[39],"clock,":[40],"operates":[42],"significantly":[43,58],"faster":[44],"than":[45],"individual":[46],"processors":[47],"that":[48],"served":[50],"the":[52,60,65,68,73,83],"This":[54],"allows":[55],"us":[56],"to":[57,82],"improve":[59],"cross":[61],"section":[62],"bandwidth":[63],"and":[64,104],"latency":[66,99],"of":[67],"NoC.":[69],"We":[70],"have":[71],"validated":[72],"design":[74],"using":[75],"22":[77],"nm":[78],"predictive":[79],"process.":[80],"Compared":[81],"state-of-the-art":[84],"mesh":[85],"NoC,":[87],"our":[88],"scheme":[89],"achieves":[90],"4.5\u00d7":[92],"better":[93,96],"bandwidth,":[94],"7.4\u00d7":[95],"contention":[97],"free":[98],"with":[100],"11%":[101],"lower":[102,106],"area":[103],"35%":[105],"power.":[107]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}