{"id":"https://openalex.org/W3143916874","doi":"https://doi.org/10.1109/date.2012.6176675","title":"Design of low-complexity digital finite impulse response filters on FPGAs","display_name":"Design of low-complexity digital finite impulse response filters on FPGAs","publication_year":2012,"publication_date":"2012-03-01","ids":{"openalex":"https://openalex.org/W3143916874","doi":"https://doi.org/10.1109/date.2012.6176675","mag":"3143916874"},"language":"en","primary_location":{"id":"doi:10.1109/date.2012.6176675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176675","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089933848","display_name":"Levent Aksoy","orcid":"https://orcid.org/0000-0001-6129-9657"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"L. Aksoy","raw_affiliation_strings":["INESC-ID, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"INESC-ID, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074598853","display_name":"Eduardo Costa","orcid":"https://orcid.org/0009-0009-2731-8864"},"institutions":[{"id":"https://openalex.org/I110676245","display_name":"Universidade Cat\u00f3lica de Pelotas","ror":"https://ror.org/0376myh60","country_code":"BR","type":"education","lineage":["https://openalex.org/I110676245"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"E. Costa","raw_affiliation_strings":["UCPEL, Pelotas, Brazil"],"affiliations":[{"raw_affiliation_string":"UCPEL, Pelotas, Brazil","institution_ids":["https://openalex.org/I110676245"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002334825","display_name":"Paulo Flores","orcid":"https://orcid.org/0000-0003-2970-3589"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"P. Flores","raw_affiliation_strings":["INESC-ID/IST, TU Lisbon, Portugal"],"affiliations":[{"raw_affiliation_string":"INESC-ID/IST, TU Lisbon, Portugal","institution_ids":["https://openalex.org/I121345201"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039448613","display_name":"Jos\u00e9 Monteiro","orcid":"https://orcid.org/0000-0003-0603-2268"},"institutions":[{"id":"https://openalex.org/I121345201","display_name":"Instituto de Engenharia de Sistemas e Computadores Investiga\u00e7\u00e3o e Desenvolvimento","ror":"https://ror.org/04mqy3p58","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I121345201","https://openalex.org/I4210125590"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"J. Monteiro","raw_affiliation_strings":["INESC-IDIIST, TU Lisbon, Lisboa, Portugal"],"affiliations":[{"raw_affiliation_string":"INESC-IDIIST, TU Lisbon, Lisboa, Portugal","institution_ids":["https://openalex.org/I121345201"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5089933848"],"corresponding_institution_ids":["https://openalex.org/I121345201"],"apc_list":null,"apc_paid":null,"fwci":1.2242,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.84244022,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1197","last_page":"1202"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.9147119522094727},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8062236309051514},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6398767232894897},{"id":"https://openalex.org/keywords/subtraction","display_name":"Subtraction","score":0.5445185303688049},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.4607497453689575},{"id":"https://openalex.org/keywords/digital-filter","display_name":"Digital filter","score":0.45474645495414734},{"id":"https://openalex.org/keywords/computational-complexity-theory","display_name":"Computational complexity theory","score":0.43115049600601196},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4269661605358124},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.40128999948501587},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34162217378616333},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.27434074878692627},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2601509690284729},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.22351408004760742}],"concepts":[{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.9147119522094727},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8062236309051514},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6398767232894897},{"id":"https://openalex.org/C68060419","wikidata":"https://www.wikidata.org/wiki/Q40754","display_name":"Subtraction","level":2,"score":0.5445185303688049},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.4607497453689575},{"id":"https://openalex.org/C36390408","wikidata":"https://www.wikidata.org/wiki/Q1163067","display_name":"Digital filter","level":3,"score":0.45474645495414734},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.43115049600601196},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4269661605358124},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.40128999948501587},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34162217378616333},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.27434074878692627},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2601509690284729},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.22351408004760742},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2012.6176675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176675","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W134377716","https://openalex.org/W1945880610","https://openalex.org/W1984615619","https://openalex.org/W2001254103","https://openalex.org/W2073419265","https://openalex.org/W2097745938","https://openalex.org/W2099181277","https://openalex.org/W2103244632","https://openalex.org/W2129833603","https://openalex.org/W2132916570","https://openalex.org/W2154656381","https://openalex.org/W2164339744","https://openalex.org/W2165837912","https://openalex.org/W2165858176"],"related_works":["https://openalex.org/W2119061873","https://openalex.org/W2144659649","https://openalex.org/W2799462564","https://openalex.org/W576725884","https://openalex.org/W2731029811","https://openalex.org/W2115232730","https://openalex.org/W2015084332","https://openalex.org/W3094080891","https://openalex.org/W3093500249","https://openalex.org/W3094473691"],"abstract_inverted_index":{"The":[0,62],"multiple":[1],"constant":[2],"multiplications":[3],"(MCM)":[4],"operation,":[5],"which":[6],"realizes":[7],"the":[8,23,28,36,48,52,69,78,81,87,101,113,125,129,132],"multiplication":[9],"of":[10,13,27,51,65,71,80,86,104,112,115,119,131],"a":[11,16,19,72],"set":[12],"constants":[14],"by":[15,97],"variable,":[17],"has":[18],"significant":[20],"impact":[21],"on":[22,91,140],"complexity":[24],"and":[25,41,59,107,155],"performance":[26],"digital":[29],"finite":[30],"impulse":[31],"response":[32],"(FIR)":[33],"filters.":[34],"Over":[35],"years,":[37],"many":[38],"high-level":[39,73],"algorithms":[40,154],"design":[42,156],"methods":[43],"have":[44],"been":[45],"proposed":[46,133],"for":[47],"efficient":[49],"implementation":[50,102],"MCM":[53,82,147,153],"operation":[54,83,109],"using":[55,151],"only":[56],"addition,":[57],"subtraction,":[58],"shift":[60],"operations.":[61],"main":[63],"contribution":[64],"this":[66],"paper":[67],"is":[68,122,149],"introduction":[70],"synthesis":[74],"algorithm":[75,134],"that":[76,128],"optimizes":[77],"area":[79],"and,":[84],"consequently,":[85],"FIR":[88,138],"filter":[89],"design,":[90],"field":[92],"programmable":[93],"gate":[94],"arrays":[95],"(FPGAs)":[96],"taking":[98],"into":[99],"account":[100],"cost":[103],"each":[105],"addition":[106],"subtraction":[108],"in":[110],"terms":[111],"number":[114],"fundamental":[116],"building":[117],"blocks":[118],"FPGAs.":[120],"It":[121],"observed":[123],"from":[124],"experimental":[126],"results":[127],"solutions":[130],"yield":[135],"less":[136],"complex":[137],"filters":[139],"FPGAs":[141],"with":[142],"respect":[143],"to":[144],"those":[145],"whose":[146],"part":[148],"implemented":[150],"prominent":[152],"methods.":[157]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}