{"id":"https://openalex.org/W2000179885","doi":"https://doi.org/10.1109/date.2012.6176556","title":"Design for test and reliability in ultimate CMOS","display_name":"Design for test and reliability in ultimate CMOS","publication_year":2012,"publication_date":"2012-03-01","ids":{"openalex":"https://openalex.org/W2000179885","doi":"https://doi.org/10.1109/date.2012.6176556","mag":"2000179885"},"language":"en","primary_location":{"id":"doi:10.1109/date.2012.6176556","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176556","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039513293","display_name":"M. Nicolaidis","orcid":"https://orcid.org/0000-0003-1091-9339"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"M. Nicolaidis","raw_affiliation_strings":["TIMA (CNRS, Grenoble INP, UJF, France","TIMA (CNRS, Grenoble INP, UJF), France"],"affiliations":[{"raw_affiliation_string":"TIMA (CNRS, Grenoble INP, UJF, France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I1294671590","https://openalex.org/I106785703"]},{"raw_affiliation_string":"TIMA (CNRS, Grenoble INP, UJF), France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I1294671590","https://openalex.org/I106785703"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053835664","display_name":"Lorena Anghel","orcid":"https://orcid.org/0000-0001-9569-0072"},"institutions":[{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"L. Anghel","raw_affiliation_strings":["TIMA (CNRS, Grenoble INP, UJF, France","TIMA (CNRS, Grenoble INP, UJF), France"],"affiliations":[{"raw_affiliation_string":"TIMA (CNRS, Grenoble INP, UJF, France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I1294671590","https://openalex.org/I106785703"]},{"raw_affiliation_string":"TIMA (CNRS, Grenoble INP, UJF), France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I1294671590","https://openalex.org/I106785703"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108415693","display_name":"N-E Zergainoh","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"funder","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"N-E Zergainoh","raw_affiliation_strings":["TIMA (CNRS, Grenoble INP, UJF, France","TIMA (CNRS, Grenoble INP, UJF), France"],"affiliations":[{"raw_affiliation_string":"TIMA (CNRS, Grenoble INP, UJF, France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I1294671590","https://openalex.org/I106785703"]},{"raw_affiliation_string":"TIMA (CNRS, Grenoble INP, UJF), France","institution_ids":["https://openalex.org/I177483745","https://openalex.org/I1294671590","https://openalex.org/I106785703"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108606295","display_name":"Y. Zorian","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Y. Zorian","raw_affiliation_strings":["Synopsys","Synopsys, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Synopsys","institution_ids":["https://openalex.org/I1335490905"]},{"raw_affiliation_string":"Synopsys, USA#TAB#","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016416631","display_name":"Tanay Karnik","orcid":"https://orcid.org/0000-0003-0072-1492"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. Karnik","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014850579","display_name":"Keith Bowman","orcid":"https://orcid.org/0000-0002-7638-9783"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Bowman","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111484157","display_name":"Jim Tschanz","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Tschanz","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113824454","display_name":"Shih\u2010Lien Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shih-Lien Lu","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112556467","display_name":"C. Tokunaga","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Tokunaga","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091408102","display_name":"Arijit Raychowdhury","orcid":"https://orcid.org/0000-0001-8391-0576"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Raychowdhury","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036997390","display_name":"Muhammad Khellah","orcid":"https://orcid.org/0000-0001-9651-5639"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Khellah","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003048953","display_name":"Jaydeep P. Kulkarni","orcid":"https://orcid.org/0000-0002-0258-6776"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Kulkarni","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076642880","display_name":"Vivek De","orcid":"https://orcid.org/0000-0001-5207-1079"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"V. De","raw_affiliation_strings":["Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A"],"affiliations":[{"raw_affiliation_string":"Intel Laboratories, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel\u00ae labs, Intel\u00ae Corporation, Hillsboro, OR, U.S.A","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111453808","display_name":"D.R. Avresky","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"D. Avresky","raw_affiliation_strings":["IRIANC, USA"],"affiliations":[{"raw_affiliation_string":"IRIANC, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":14,"corresponding_author_ids":["https://openalex.org/A5039513293"],"corresponding_institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I177483745"],"apc_list":null,"apc_paid":null,"fwci":2.2408,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.88467883,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"27","issue":null,"first_page":"677","last_page":"682"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mean-time-between-failures","display_name":"Mean time between failures","score":0.7694123983383179},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6753820776939392},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6156449317932129},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5701382756233215},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5665237903594971},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47190243005752563},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.4409911036491394},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.42562156915664673},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.4121285080909729},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.29325366020202637},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21443316340446472},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.1395052969455719},{"id":"https://openalex.org/keywords/failure-rate","display_name":"Failure rate","score":0.13332638144493103}],"concepts":[{"id":"https://openalex.org/C44154001","wikidata":"https://www.wikidata.org/wiki/Q754940","display_name":"Mean time between failures","level":3,"score":0.7694123983383179},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6753820776939392},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6156449317932129},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5701382756233215},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5665237903594971},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47190243005752563},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.4409911036491394},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.42562156915664673},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.4121285080909729},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.29325366020202637},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21443316340446472},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.1395052969455719},{"id":"https://openalex.org/C163164238","wikidata":"https://www.wikidata.org/wiki/Q2737027","display_name":"Failure rate","level":2,"score":0.13332638144493103},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/date.2012.6176556","is_oa":false,"landing_page_url":"https://doi.org/10.1109/date.2012.6176556","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W67823304","https://openalex.org/W1541483005","https://openalex.org/W1792362277","https://openalex.org/W1983696732","https://openalex.org/W1995827686","https://openalex.org/W2007325303","https://openalex.org/W2013185880","https://openalex.org/W2040168971","https://openalex.org/W2064712157","https://openalex.org/W2070907515","https://openalex.org/W2096314285","https://openalex.org/W2112199513","https://openalex.org/W2113683092","https://openalex.org/W2115933959","https://openalex.org/W2119431537","https://openalex.org/W2120740899","https://openalex.org/W2123951243","https://openalex.org/W2125793787","https://openalex.org/W2138634741","https://openalex.org/W2156667996","https://openalex.org/W2162925991","https://openalex.org/W2168433060","https://openalex.org/W2171372273","https://openalex.org/W2178304595","https://openalex.org/W3144072891","https://openalex.org/W4229522565","https://openalex.org/W4256298596","https://openalex.org/W4297823684","https://openalex.org/W6676972942","https://openalex.org/W6678747069"],"related_works":["https://openalex.org/W1983353130","https://openalex.org/W4400370279","https://openalex.org/W168429299","https://openalex.org/W1513192318","https://openalex.org/W2064185557","https://openalex.org/W2081804767","https://openalex.org/W2114661492","https://openalex.org/W2059606485","https://openalex.org/W4251879367","https://openalex.org/W2564310820"],"abstract_inverted_index":{"This":[0],"session":[1],"brings":[2],"together":[3,17],"specialists":[4],"from":[5],"the":[6,22,52],"DfT,":[7],"DfY":[8],"and":[9,26,39,61,99],"DfR":[10],"domains":[11],"that":[12],"will":[13],"address":[14],"key":[15],"problems":[16],"with":[18,29,51],"their":[19],"solutions":[20],"for":[21],"14":[23],"nm":[24],"node":[25],"beyond,":[27],"dealing":[28],"extremely":[30],"complex":[31],"chips":[32],"affected":[33,87],"by":[34,88],"high":[35],"defect":[36],"levels,":[37],"unpredictable":[38],"heterogeneous":[40],"timing":[41,71],"behavior,":[42],"circuit":[43],"degradation":[44],"over":[45,97],"time,":[46],"including":[47],"extreme":[48],"situations":[49],"related":[50],"ultimate":[53],"CMOS":[54],"nodes,":[55,59],"where":[56],"all":[57,91],"processor":[58],"routers":[60],"links":[62],"of":[63,83],"single-chip":[64],"massively":[65],"parallel":[66],"tera-device":[67],"processors":[68],"could":[69],"comprise":[70],"faults":[72,76],"(such":[73],"as":[74],"delay":[75],"or":[77],"clock":[78],"skews);":[79],"a":[80],"large":[81],"percentage":[82],"these":[84],"parts":[85,92],"are":[86],"catastrophic":[89,101],"failures;":[90],"experience":[93],"significant":[94],"performance":[95],"degradations":[96],"time;":[98],"new":[100],"failures":[102],"occur":[103],"at":[104],"low":[105],"MTBF.":[106]},"counts_by_year":[{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":4}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}